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CHAPTER 14 MULTI-FUNCTIONAL TIMER
14.4.10
Waveform Control Register (SIGCR)
Waveform control register is used to control how the operating clock frequencies, noise
cancellation function enable, DTTI0 input enable and DTTI0 interrupt.
■
Waveform Control Register (SIGCR)
Figure 14.4-22 Waveform Control Register (SIGCR)
Address bit15
14
13
12
11
10
9
8
Initial value
000059
H
DTIE DTIF NRSL DCK2 DCK1 DCK0 NWS1 NWS0 00000000
B
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
NWS1
NWS0
DTTI0 Noise width selection bits
0
0
Cancel 4-cycle noise.
0
1
Cancel 8-cycle noise.
1
0
Cancel 16-cycle noise.
1
1
Cancel 32-cycle noise.
DCK2 DCK1 DCK0
Operating clock selection bit
0
0
0
φ
(62.5 ns,
φ
= 16 MHz)
0
0
1
φ
/2 (125 ns,
φ
= 16 MHz)
0
1
0
φ
/4 (250 ns,
φ
= 16 MHz)
0
1
1
φ
/8 (500 ns,
φ
= 16 MHz)
1
0
0
φ
/16 (1
µ
s,
φ
= 16 MHz)
1
0
1
φ
/32 (2
µ
s,
φ
= 16 MHz)
1
1
0
φ
/64 (4
µ
s,
φ
= 16 MHz)
1
1
1
Prohibited
φ
: Machine clock
NRSL
Noise cancellation function enable bit
0
DTTI0 input does not go thru the noise cancellation circuit.
1
DTTI0 input goes thru the noise cancellation circuit.
DTIF
DTTI0 interrupt flag bit
Read
Write
0
No interrupt request
Clear this bit
1
Has interrupt request
No effect
DTIE
DTTI0 input enable bit
0
Disable DTTI0 input
1
Enable DTTI0 input
R/W : Read and Write
: Initial value
Summary of Contents for MB90460 Series
Page 1: ...The following document contains information on Cypress products ...
Page 3: ......
Page 5: ......
Page 9: ...iv ...
Page 41: ...22 CHAPTER 1 OVERVIEW ...
Page 45: ...26 CHAPTER 2 NOTES ON HANDLING DEVICES ...
Page 83: ...64 CHAPTER 3 CPU ...
Page 95: ...76 CHAPTER 4 RESET ...
Page 107: ...88 CHAPTER 5 CLOCK ...
Page 131: ...112 CHAPTER 6 LOW POWER CONSUMPTION MODE ...
Page 175: ...156 CHAPTER 7 INTERRUPT ...
Page 181: ...162 CHAPTER 8 MODE SETTING ...
Page 223: ...204 CHAPTER 9 I O PORT ...
Page 237: ...218 CHAPTER 10 TIME BASE TIMER ...
Page 247: ...228 CHAPTER 11 WATCHDOG TIMER ...
Page 275: ...256 CHAPTER 12 16 BIT RELOAD TIMER ...
Page 373: ...354 CHAPTER 14 MULTI FUNCTIONAL TIMER ...
Page 485: ...466 CHAPTER 16 PWC Timer ...
Page 531: ...512 CHAPTER 17 UART ...
Page 559: ...540 CHAPTER 19 DELAYED INTERRUPT GENERATOR MODULE ...
Page 589: ...570 CHAPTER 20 8 10 BIT A D CONVERTER ...
Page 601: ...582 CHAPTER 21 ROM CORRECTION FUNCTION ...
Page 633: ...614 CHAPTER 23 512K 1024K BIT FLASH MEMORY ...
Page 645: ...626 CHAPTER 24 EXAMPLE OF F2 MC 16LX MB90F462 F462A F463A CONNECTION FOR SERIAL WRITING ...
Page 715: ...696 APPENDIX ...
Page 716: ...697 INDEX INDEX The index follows on the next page This is listed in alphabetic order ...
Page 739: ......