Fujitsu MB90390 Series, Hardware Manual, Page: 554 / 740

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CHAPTER 24 STEPPING MOTOR CONTROLLER
24.2.2 PWM1 and PWM2 Compare Registers
The contents of the two 8-bit compare registers determine the widths of PWM pulses.
The stored value of "00
H
" represents the PWM duty of 0% and "FF
H
" represents the
duty of 99.6%.
■
PWM1 and PWM2 Compare Registers
PWM1 and PWM2 compare registers are accessible at any time, however the modified values are reflected
to the pulse width at the end of the current PWM cycle after the BS bit of the PWM2 Select register is set to
"1".
Figure 24.2-3 PWM1 and PWM2 Compare Registers
Figure 24.2-4 Examples for Duty Cycle Settings
7 bit
bit
6 5 4 3 2 1 0
Initial value
X X X X X X X X
B
PWC1n (lo w er)
R/W R/W R/W R/W R/W R/W R/W R/W
H
SMC0: 003550
SMC1: 003554
SMC2: 003558
SMC3: 00355C
SMC4: 003560
H
H
H
H
SMC5: 003564
H
15 14 13 12 11 10 9 8
Initial value
X X X X X X X X
B
R/W R/W R/W R/W R/W R/W R/W R/W
H
SMC0: 003551
SMC1: 003555
SMC2: 003559
SMC3: 00355D
SMC4: 003561
H
H
H
H
PWC2n (upper)
SMC5: 003565
H
D7 D6 D5 D4 D3 D2 D1 D0
D7 D6 D5 D4 D3 D2 D1 D0
Address:
One PWM Cycle
00
H
Register value
80
H
256 input clock cycles
128 input clock cycles
255 input clock cycles
FF
H