Fujitsu MB90390 Series, Hardware Manual, Page: 342 / 740

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CHAPTER 19 UART0, UART1
19.3 UART0, UART1 Registers
The UART0, UART1 have the following four registers each:
• Serial mode control register
• Status register
• Input data register/output data register
• Rate and data register
■
UART0, UART1 Registers
7 6 5 4 3 2 1 0
PEN S BL MC1 MC0 S MDE RFC S CKE S OE
UMC0
(R/W) (R/W) (R/W) (R/W) (R/W) (W) (R/W) (R/W)
(0) (0) (0) (0) (0) (1) (0) (0)
S eri a l mode control regi s ter
b it
b it
b it
b it
Addre ss : ch.0 000020
H
Re a d/write
Initi a l v a l u e
15 14 1 3 12 11 10 9 8
RDRF ORFE PE TDRE RIE TIE RBF TBF
(R) (R)
(R) (R) (R/W) (R/W) (R) (R)
(0) (0) (0) (1) (0) (0) (0) (0)
U S R0
Re a d/write
Initi a l v a l u e
S t a t us regi s ter
Addre ss : ch.0 000021
H
7 6 5 4 3 2 1 0
D7 D6 D5 D4 D 3 D2 D1 D0
(R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W)
(X) (X) (X) (X) (X) (X) (X) (X)
UIDR0(re a d)
UODR0(write)
Re a d/write
Initi a l v a l u e
Inp u t d a t a regi s ter/
Addre ss : ch.0 000022
H
O u tp u t d a t a regi s ter
15 14 1 3 12 11 10 9 8
BCH RC 3 RC2 RC1 RC0 BCH0 P D 8
URD0
(R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W)
(0) (0) (0) (0) (0) (0) (0) (X)
Re a d/write
Initi a l v a l u e
R a te a nd d a t a regi s ter
Addre ss : ch.0 00002 3
H
ch.1 000024
H
ch.1 000025
H
ch.1 000026
H
ch.1 000027
H
UMC1
U S R1
UIDR1(re a d)
UODR1(write)
URD1