Fujitsu MB86R11 Hardware Manual Download Page 9

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1. Outline of MB86R11EVB

MB86R11

Evaluation Board

MB86R11EVB Hardware Manual

1.3.

External view

The external view of MB86R11EVB is shown as follows.

Figure 1-1 External view of MB86R11EVB

External view of CPU board

Figure 1-2 External view of CPU board

Summary of Contents for MB86R11

Page 1: ...MB86R11 Evaluation Board MB86R11EVB Hardware Manual January 2011 The 1 1 edition FUJITSU SEMICONDUCTOR LIMITED ...

Page 2: ...basic function Trademarks ARM is a registered trademark of ARM Limited in the EU and other countries Cortex is a trademark of ARM Limited in the EU and other countries The company names and brand names herein are the trademarks or registered trademarks of their respective owners Notation Term Description MB86R11EVB Generic term of MB86R11 evaluation board which is a set of MB86R11EVB CPU01 CPU boa...

Page 3: ... this document are designed developed and manufactured as contemplated for general use including without limitation ordinary industrial use general office use personal use and household use but are not designed developed and manufactured as contemplated 1 for use accompanying fatal risks or dangers that unless extremely high safety is secured could have a serious effect to the public and could lea...

Page 4: ...iv MB86R11 Evaluation Board MB86R11EVB Hardware Manual Revision History Date Ver Contents 2011 1 13 1 0 Newly issued 2011 1 25 1 1 Table 9 1 Revised description Added FPGA specifications ...

Page 5: ...ware 11 3 1 CPU board 11 3 1 1 External Bus 11 3 1 2 DDR2 11 3 1 3 USB Host 11 3 1 4 USB Function 12 3 1 5 ARM JTAG ETM 12 3 1 6 Selection of boot flash memory 13 3 1 7 Pin Multiplex Switch 14 3 1 8 Jumper setting 16 3 2 Base board 17 3 2 1 FPGA 17 3 2 2 External Bus 17 3 2 3 Display 18 3 2 4 Capture 24 3 2 5 Ethernet 26 3 2 6 EEPROM 26 3 2 7 I2S AUDIO 26 3 2 8 CAN 27 3 2 9 USART UART 28 3 2 10 GP...

Page 6: ... 3 15 External INT 52 4 Board interface 53 4 1 CPU Base board I F 53 4 2 Base Option board I F 58 4 3 Customer I F 63 5 Memory map 66 5 1 MB86R11EVB memory map 66 5 2 FPGA register 66 5 2 1 VERSION register 67 5 2 2 PINMUX register 68 5 2 3 DEVICE_SEL register 70 5 2 4 ACC_TEST register 71 5 2 5 FPGA signal timing 72 6 Allocation of peripheral resource and I2C port 73 7 Power system diagram 74 8 C...

Page 7: ...ard has external I F and the power supply input part MB86R11EVB OPT01 Option board This board mounts only the external peripheral functions The pin of MB86R11 is multifunctional and is switched by the external pin setting or the register setting In MB86R11EVB to realize the switching of each resource according to the setting mode by an enable control the buffer is inserted between MB86R11 and each...

Page 8: ... I F I2S I F MLB I F CAN I F LIN USART UART I F SD I F USB I F PWM I F GPIO I F IrDA I F IDE I F TS I F JTAG I F TRACE I F I2C I F A D I F TCON Quad SPI SFI External Bus DMA REQ External INT SW LED 3 Operating ambient temperature Normal temperature 4 Storage temperature 0 to 70 C 5 Humidity Normal humidity No condensation 6 Environment friendly Conforming product 7 Power supply AC adaptor input 12...

Page 9: ... MB86R11 Evaluation Board MB86R11EVB Hardware Manual 1 3 External view The external view of MB86R11EVB is shown as follows Figure 1 1 External view of MB86R11EVB External view of CPU board Figure 1 2 External view of CPU board ...

Page 10: ...line of MB86R11EVB MB86R11 Evaluation Board MB86R11EVB Hardware Manual External view of Base board Figure 1 3 External view of Base board External view of Option board Figure 1 4 External view of Option board ...

Page 11: ...CPU Board Option Board Base Board CPU Board Option Board MB86R1 1 A B A B CPUboard side connector CN8 Base board side connector CN31 CPU board side connector CN9 Base board side connector CN32 Option board side connector CN7 Base board side connector CN33 Option board side connector CN8 Base board side connector CN34 Figure 1 5 Connection configuration of MB86R11EVB ...

Page 12: ...MT47H64M16HR 25E_IT Micron 2 1Gbit 64M 16bit 2 2 NOR FLASH JS28F512M29EWL Numonyx 2 512Mbit 32Mword 16bit 2 This is a composition when 32bit bus is connected When boot from NOR FLASH is used it becomes a composition of 512Mbit 1 because the bus is fixed to 16bit 3 USB Host 292303 1 Tyco USB A connector USB Host 292303 1 Tyco USB A connector Exclusive use with USB Function 4 USB Function UX60SC MB ...

Page 13: ... I CVBS YUV ADV7403KSTZ Analog devices Capture0 External input Header pin OQW 11 4 2 20PW Mac8 1 27mm pitch CVBS YUV ADV7403KSTZ Analog devices Video Component 720P ADV7403KSTZ Analog devices External input Header pin OQW 11 4 2 10PW Mac8 1 27mm pitch CVBS YUV ADV7403KSTZ Analog devices External input Header pin OQW 11 4 2 10PW Mac8 1 27mm pitch CVBS YUV ADV7403KSTZ Analog devices 2 Capture 4ch Ca...

Page 14: ...n Header pin OQW 11 4 2 07PW Mac8 1 27mm pitch 12 I2C CH0 CH1 For setting of IC 13 EEPROM BR25S256F ROHM 256Kbit SW 1 SKRPABE010 ALPS ELECTRI Tact switch INT_A0 External input Header pin FFC 03ASM1 HONDA TSUSHI 2 54mm pitch 14 External INT INT_A1 External input Header pin FFC 03ASM1 HONDA TSUSHI 2 54mm pitch 15 NAND FLASH MT29F2G08ABAEAWP Micron 2Gbit 8bit Bus JTAG 98424 G52 14ALF FCI For FPGA wri...

Page 15: ...2 04PW Mac8 1 27mm pitch 4 CAN CH1 D sub9 RDED 9P LNA 4 40 55 HONDA TSUSHIN 5 LIN USART UART CH5 B2B PH SM4 TB JST 6 SD 2 CH1 CH2 SD card slot DM1AA SF PEJ HRS 7 PWM 12 External output Header pin OQW 11 4 2 07PW Mac8 1 27mm pitch 8 IrDA External input output Header pin OQW 11 4 2 06PW Mac8 1 27mm pitch 9 I2C CH2 4 External input output Header pin FFC 03ASM1 HONDA TSUSHIN 2 54mm pitch 10 General pu...

Page 16: ...1 DISP2 DDR2 Nor Flash ICE TRACE USB Host USB Host USB Function CAP0 PIN PIN PIN DISP0 DISP1 PIN CAP1 PIN CAP2 PIN CAP3 PIN Ethernet CAN USART SD Card TS NAND Flash AUDIO GPIO AUDIO USART SD Card PWM IrDA DMA REQ Quad SPI SPI Flash I2C A D TCON INT Enable signal of each buffer MLB PIN PIN I2C EEPROM INT CAN PIN PIN RSDS IDE LIN Figure 2 1 Block diagram of MB86R11EVB ...

Page 17: ...er Manufacturer Quantity Remarks 1 NOR FLASH JS28F512M29EWL Numonyx 2 128MB 32Mword 16bit 2 3 1 2 DDR2 The CPU board has 2Gbit 1Gbit 2 as DDR2 interface It is a composition in which 4Gbit 2Gbit 2 can be connected Table 3 3 DDR2 No Item Model number Manufacturer Quantity Remarks 1 DDR2 MT47H64M16HR 25E_IT MICRON 2 256MB 64Mb 16bit 2 3 1 3 USB Host The CPU board has the USB2 0 Host by 2 ports CN3 an...

Page 18: ...UX60SC MB 5ST HRS 1 miniB 2 Schmitt buffer SN74LVC1G17DCK TI 1 VBUS detection 3 Crystal oscillator MXO3 7050 48MHz MITADENPA 1 48MHz 50ppm All USB ports 3 1 5 ARM JTAG ETM The CPU board has JTAG CN1 and the ETM connector CN2 for the ARM debugging Enable ETM probe HLX600TP and JTAG cable HLX600JP of YDC AdviceLUNA to be connected Table 3 6 ARM JTAG ETM No Item Model number Manufacturer Quantity Rem...

Page 19: ... It can select either of NOR FLASH or NAND FLASH of the external memory Table 3 7 Slide switch No Item Model number Manufacturer Quantity Remarks 1 Slide switch MAS D20A1 Fujisoku 1 SW1 Selection of boot memory type Table 3 8 SW1 setting SW1 Boot memory type Remarks MB86R11 side NAND FLASH Cannot used The other side NOR FLASH Default Default NOR FLASH NAND FLASH MB86R11 ...

Page 20: ...tion Default 4 1 CRIPM 3 0 ON 0 OFF 1 SW 4 3 2 1 ON ON ON ON 0000 SW 4 3 2 1 OFF OFF OFF OFF 1111 SW 4 3 2 1 OFF ON ON ON 5 PLLBYPASS OFF PLL clock is not bypassed ON PLL clock is bypassed OFF 6 PSMODE ON PSMODE are reflected to the PLL clock frequency OFF PSMODE are not reflected to the PLL clock frequency ON 7 VINTHI ON The exception vectors are located at 0xFFFF_0000 OFF The exception vectors a...

Page 21: ...ode0 SW 2 1 OFF ON Mode1 SW 2 1 ON ON Mode1 SW 2 1 ON OFF Mode2 SW 2 1 OFF OFF 3 MPXMODE 2 OFF Mode0 ON Mode2 ON 4 NOR_EAEN NOR FLASH bus select ON 32bit OFF 16bit OFF 5 JTAGSEL JTAG select OFF Normal ON DFT OFF 6 TEST MODE TEST mode OFF Normal ON TEST mode OFF 7 TRACEEN0 Pin Group B ETM ON Used OFF Unused OFF 8 TRACEEN1 Pin Group H ETM ON Used OFF Unused OFF ON 8 1 Default ...

Page 22: ...A TSUSHIN 7 1 row 2 poles Table 3 13 Jumper setting CN Function Description Default 10 OSC Open Fixed Open 11 VRH0 Short ADC is not used Open ADC is used Short 12 VRH1 Short ADC is not used Open ADC is used Short 13 VRL0 Short ADC is not used Open ADC is used Short 14 VRL1 Short ADC is not used Open ADC is used Short 15 VIN0 Short ADC is not used Open ADC is used Short 16 VIN1 Short ADC is not use...

Page 23: ...s connects the following signals with FPGA lower 10 bits of address A 11 1 32 bits control signal excluding the signal for NAND of data Table 3 14 FPGA No Item Model number Manufacturer Quantity Remarks 1 FPGA XC6SLX100 2FGG676C Xilinx 1 Spartan6 2 Writing connector 98424 G52 14ALF FCI 1 2 rows 14 poles 3 Configuration ROM S25FL032P0XMFI011 SPANSION 1 32Mbit 3 2 2 External Bus The 256MB NAND FLASH...

Page 24: ...r of Display is described below Table 3 16 Display No Item Model number Manufacturer Quantity Remarks 1 DVI transmitter SiI164BCT64 SiliconImage 2 2 DVI I connector 1734148 1 Tyco 2 3 Video DAC ADV7343 AnalogDevices 1 4 AnalogRGB connector 1 1734570 1 Tyco 1 Dsub15 5 NTSC connector LPR6520 0804F SMK 1 6 Display Header pins I F OQW 11 4 2 20PW Mac8 2 2 rows 40 poles 1 27mm pitch Remark DISP0 connec...

Page 25: ...G1 I 34 R5 I 15 G2 I 35 R6 I 16 G3 I 36 R7 I 17 G4 I 37 GND Ground 18 G5 I 38 GND Ground 19 G6 I 39 CLK I 20 G7 I 40 GND Ground Remark The physical pin assignment is the same as the audio general purpose pin header Table 3 18 Capture YUV CH0 CH1 CH2 CH3 pin assignment No Signal name I O Description No Signal name I O Description 1 V0 I 2 GND Ground 3 V1 I 4 GND Ground 5 V2 I 6 GND Ground 7 V3 I 8 ...

Page 26: ...ed ISEL OFF then this pin is the I2C clock input If the I2C is disabled ISEL ON then this pin selects the input bus width Input Bus Select BSEL OFF selects 24 bit input mode BSEL ON selects 12 bit input mode OFF 3 EDGE HTPLG Edge select Hot Plug input If the I2C bus is enabled ISEL OFF then this pin is used to monitor the Hot Plug detect signal Please refer to the DVI or VESA P D and DFP standards...

Page 27: ...ins are active for backward compatibility These pins must be used to send DC signals only during the blanking time ISEL ON DKEN OFF DK 1 3 are active these inputs are used to select the De skewing setting for the input bus ISEL OFF DKEN OFF A 1 3 are active these bits are used to set the lower 3 bits of the I2C device address SW 7 6 5 A 1 2 3 OFF OFF OFF I2C device address 0111 A3 A2 A1 0111000 1 ...

Page 28: ...ed ISEL OFF then this pin is the I2C clock input If the I2C is disabled ISEL ON then this pin selects the input bus width Input Bus Select BSEL OFF selects 24 bit input mode BSEL ON selects 12 bit input mode OFF 3 EDGE HTPLG Edge select Hot Plug input If the I2C bus is enabled ISEL OFF then this pin is used to monitor the Hot Plug detect signal Please refer to the DVI or VESA P D and DFP standards...

Page 29: ...ins are active for backward compatibility These pins must be used to send DC signals only during the blanking time ISEL ON DKEN OFF DK 1 3 are active these inputs are used to select the De skewing setting for the input bus ISEL OFF DKEN OFF A 1 3 are active these bits are used to set the lower 3 bits of the I2C device address SW 7 6 5 A 1 2 3 ON OFF OFF I2C device address 0111 A3 A2 A1 0111001 1 1...

Page 30: ... 28 63636MHz MITADENPA 1 28 63636MHz 50ppm 3 NTSC connector LPR6520 0804F SMK 4 4 HD connector LPR6520 0804F SMK 3 5 DVI receiver SiI1161 SiliconImage 1 6 DVI I connector 1734148 1 Tyco 1 7 EEPROM 24LC21A P Microchip Technology 1 Socket mounting 8 9 Remark Capture0 connector DVI I CN5 NTSC CN6 Header pin CN35 Capture1 connector HD CN39 CN41 NTSC CN8 Header pin CN28 Capture2 connector NTSC CN9 Head...

Page 31: ...G1 I 34 R5 I 15 G2 I 35 R6 I 16 G3 I 36 R7 I 17 G4 I 37 GND Ground 18 G5 I 38 GND Ground 19 G6 I 39 CLK I 20 G7 I 40 GND Ground Remark The physical pin assignment is the same as the audio general purpose pin header Table 3 21 Capture YUV CH0 CH1 CH2 CH3 pin assignment No Signal name I O Description No Signal name I O Description 1 V0 I 2 GND Ground 3 V1 I 4 GND Ground 5 V2 I 6 GND Ground 7 V3 I 8 ...

Page 32: ...25MHz 3 2 6 EEPROM The EEPROM is connected to SPI0 of the Base board Table 3 23 EEPROM No Item Model number Manufacturer Quantity Remarks 1 EEPROM BR25S256F ROHM 1 256Kbit 3 2 7 I2S AUDIO As for the Base board I2C0 1ch is connected to the audio device as the audio interface The audio device is connected to interface CN12 13 for the connection of the microphone and the speaker I2C0 is connected to ...

Page 33: ...r CN14 as the CAN interface Table 3 25 CAN No Item Model number Manufacturer Quantity Remarks 1 Transceiver SN65HVD234 TI 1 2 Dsub9 connector RDED 9P LNA 4 40 55 HRS 1 3 Switch G 12AP Nihon Kaiheiki 1 SW3 CAN CH0 SW3 Description CAN CH0 Bus termination is inactive CONNECT Bus termination is active default Figure 3 3 SW3 CAN CH0 circuit CAN CH0 CONNECT ...

Page 34: ...26 UART No Item Model number Manufacturer Quantity Remarks 1 Transceiver MAX3232CUE MAXIM 1 2port type 2 Dsub9 connector RDED 9P LNA 4 40 55 HRS 2 3 General purpose pin header OQW 11 4 2 03PW Mac8 2 2 rows 6 poles Table 3 27 Details of serial port No Item Contents Remarks 1 Baud rate Software control 2 Data length Software control 3 Parity Software control 4 Stop bit Software control 5 Flow contro...

Page 35: ...and the 4 channels are used for LED and the pin header In addition GPIO19 21 is used for the power supply control of the SD card Table 3 28 GPIO No Item Model number Manufacturer Quantity Remarks 1 LED SML 310MT ROHM 4 Green 2 Tact switch SKRPABE010 ALPS ELECTRIC 6 3 General purpose connector OQW 11 4 2 03PW Mac8 1 2 row 6 poles Figure 3 4 GPIO circuit Table 3 29 GPIO pin assignment No Signal name...

Page 36: ...to the SD card is controlled with the pin of MB86R11 see Figure 3 Table 3 30 SDIO No Item Model number Manufacturer Quantity Remarks 1 SD card slot DM1AA SF PEJ HRS 1 No SD power supply control pin SD card Remarks 1 INT_A5 GPIO19 SD CH0 0 PWR ON 2 INT_A6 GPIO20 SD CH1 0 PWR ON It is mounted on the Option board 3 INT_A7 GPIO21 SD CH2 0 PWR ON It is mounted on the Option board Figure 3 5 SDIO circui...

Page 37: ... No Item Model number Manufacturer Quantity Remarks 1 General purpose pin header OQW 11 4 2 07PW Mac8 1 2 rows 14 poles Table 3 32 TS connector No Signal name I O Description 1 D0 O 2 D1 O 3 D2 O 4 D3 O 5 D4 O 6 D5 O 7 D6 O 8 D7 O 9 TSCTL1 O 10 TSCTL2 O 11 GND Ground 12 GND Ground 13 CLK O 14 GND Ground Remark The physical pin assignment is the same as the general purpose pin header ...

Page 38: ...number Manufacturer Quantity Remarks 1 Connector for MOST controller connection A3A 10PA 2SV 71 HRS 1 2 rows 10 poles Table 3 34 MOST debug connector pin assignment No Signal name I O Description 1 GND Ground 2 MLBCLK IO 3 GND Ground 4 MLBSIG IO 5 GND Ground 6 MLBDAT IO 7 GND Ground 8 N C 9 GND Ground 10 N C Remark The physical pin assignment is the same as the general purpose pin header ...

Page 39: ...y Remarks 1 DIP SW CHS 08B NIDEC COPAL ELECTRONICS 7 SW10 SW_CB SW10 switches the PIN mode of PIN Group B and C of MB86R11 Table 3 36 SW10 setting SW10 Group Description Default 3 1 B SW 3 2 1 ON ON OFF Mode1 SW 3 2 1 ON OFF OFF Mode3 SW 3 2 1 OFF ON OFF Mode5 Others depended on setting of MPXMODE 2 MPXMODE 2 OFF Mode0 MPXMODE 2 ON Mode2 SW 3 2 1 OFF ON OFF 6 4 C SW 6 5 4 ON ON ON Mode0 SW 6 5 4 O...

Page 40: ... 4 ON OFF OFF Mode3 SW 6 5 4 OFF ON OFF Mode5 Others Mode0 SW 6 5 4 ON ON ON 8 7 SW 8 7 OFF OFF SW12 SW_GF SW12 switches the PIN mode of PIN Group F and G of MB86R11 Table 3 38 SW12 setting SW12 Group Description Default 3 1 F SW 3 2 1 ON ON ON Mode0 SW 3 2 1 ON ON OFF Mode1 SW 3 2 1 ON OFF OFF Mode3 SW 3 2 1 OFF ON ON Mode4 Others Mode0 SW 3 2 1 ON ON ON 6 4 G SW 6 5 4 ON ON ON Mode0 SW 6 5 4 ON ...

Page 41: ...n Default 3 1 H SW 3 2 1 ON ON ON Mode0 SW 3 2 1 ON ON OFF Mode1 SW 3 2 1 ON OFF ON Mode2 SW 3 2 1 ON OFF OFF Mode3 SW 3 2 1 OFF ON ON Mode4 SW 3 2 1 OFF ON OFF Mode5 Others Mode0 SW 3 2 1 ON ON ON 6 4 I SW 6 5 4 ON ON ON Mode0 SW 6 5 4 ON ON OFF Mode1 SW 6 5 4 ON OFF ON Mode2 SW 6 5 4 ON OFF OFF Mode3 SW 6 5 4 OFF ON OFF Mode5 Others Mode0 SW 6 5 4 ON ON ON 8 7 SW 8 7 OFF OFF 8 1 ON Default ...

Page 42: ...t CN22 PIN_HEADER 2 1 Capture 0 NTSC 8bit YCbCr CN35 PIN_HEADER SW 2 1 OFF ON SW 2 1 ON ON NTSC HD 8bit YCbCr CN8 CVBS CN39 HD_Y CN40 HD_Pb CN41 HD_Pr SW 3 ON 3 Capture 1 NTSC HD 8bit YCbCr CN28 PIN_HEADER SW 3 OFF ON NTSC 8bit YCbCr CN9 CVBS SW 3 ON 4 Capture 2 NTSC 8bit YCbCr CN29 PIN_HEADER SW 3 OFF ON NTSC 8bit YCbCr CN10 CVBS SW 3 ON 5 Capture 3 NTSC 8bit YCbCr CN30 PIN_HEADER SW 3 OFF ON 8 6...

Page 43: ... mode 1 DSEL SDA Dual edge clock select I2C Data This pin is an open collector input output If I2C bus is enabled ISEL OFF then this pin is the I2C data line If the I2C bus is disabled ISEL ON then this pin selects whether single clock dual edge is used Dual Edge clock select DSEL OFF IDCK latches input data on both falling and rising clock edges DSEL ON IDCK IDCK latches input data on only fallin...

Page 44: ...I2C mode ISEL OFF DKEN pin must be set to OFF DK 3 1 pins are ignored and the De skewing increments are selected through the I2C interface Non I2C mode ISEL ON DKEN ON then default De skewing setting is used DKEN OFF then DK 3 1 is used as the De skewing setting OFF 7 5 CTL 1 3 A 1 3 DK 1 3 The use of these multi function inputs depends on the settings of ISEL and DKEN ISEL ON DKEN ON General Purp...

Page 45: ...ed ISEL OFF then this pin is the I2C clock input If the I2C is disabled ISEL ON then this pin selects the input bus width Input Bus Select BSEL OFF selects 24 bit input mode BSEL ON selects 12 bit input mode OFF 3 EDGE HTPLG Edge select Hot Plug input If the I2C bus is enabled ISEL OFF then this pin is used to monitor the Hot Plug detect signal Please refer to the DVI or VESA P D and DFP standards...

Page 46: ...ins are active for backward compatibility These pins must be used to send DC signals only during the blanking time ISEL ON DKEN OFF DK 1 3 are active these inputs are used to select the De skewing setting for the input bus ISEL OFF DKEN OFF A 1 3 are active these bits are used to set the lower 3 bits of the I2C device address SW 7 6 5 A 1 2 3 ON OFF OFF I2C device address 0111 A3 A2 A1 0111001 1 1...

Page 47: ...ed ISEL OFF then this pin is the I2C clock input If the I2C is disabled ISEL ON then this pin selects the input bus width Input Bus Select BSEL OFF selects 24 bit input mode BSEL ON selects 12 bit input mode OFF 3 EDGE HTPLG Edge select Hot Plug input If the I2C bus is enabled ISEL OFF then this pin is used to monitor the Hot Plug detect signal Please refer to the DVI or VESA P D and DFP standards...

Page 48: ...ins are active for backward compatibility These pins must be used to send DC signals only during the blanking time ISEL ON DKEN OFF DK 1 3 are active these inputs are used to select the De skewing setting for the input bus ISEL OFF DKEN OFF A 1 3 are active these bits are used to set the lower 3 bits of the I2C device address SW 7 6 5 A 1 2 3 OFF ON OFF I2C device address 0111 A3 A2 A1 0111010 1 1...

Page 49: ...1 2 Audio mini jack STX 2500 3N KYCON 2 φ3 5 3 Audio speaker FFC 2ASM1 HONDA TSUSHIN 1 1 row 2 poles 4 General purpose pin header OQW 11 4 2 04PW Mac8 2 2 rows 8 poles Table 3 43 I2S2 3 connector No Signal name I O Description 1 GND Ground 2 GND Ground 3 ECLK I 4 SCK B 5 WS B 6 SDI I 7 SDO O 8 GND Ground Remark The physical pin assignment is the same as the general purpose pin header Table 3 44 I2...

Page 50: ...55 HRS 1 3 Switch G 12AP Nihon Kaiheiki 1 3 3 4 USART UART The Option board has 3 channels ch2 ch4 as the UART interface This interface is connected to the general purpose pin header The correspondence of the UART channel and the connector is as follows Ch2 CN18 Ch3 CN20 Ch4 CN22 Table 3 46 UART No Item Model number Manufacturer Quantity Remarks 1 General purpose pin header OQW 11 4 2 03PW Mac8 3 ...

Page 51: ... Input the power from header pin CN26 The USART5_SCK signal is connected to sleep pin Low active of the device Table 3 48 LIN No Item Model number Manufacturer Quantity Remarks 1 Transceiver TJA1020T NXP 1 2 Connector B2B PH SM4 TB JST 1 2 poles Table 3 49 LIN connector pin assignment No Signal name I O Description 1 GND Ground 2 LIN_BUS0 IO LIN signal Table 3 50 Jumper setting CN Function Descrip...

Page 52: ...ard slot The power supply to the SD card is controlled with the pin of MB86R11 see Figure 3 Table 3 51 SDIO No Item Model number Manufacturer Quantity Remarks 1 SD card slot DM1AA SF PEJ HRS 2 No SD power supply control pin SD card Remarks 1 INT_A5 GPIO19 SD CH0 0 PWR ON It is mounted on the Base board 2 INT_A6 GPIO20 SD CH1 0 PWR ON 3 INT_A7 GPIO21 SD CH2 0 PWR ON Figure 3 7 SDIO circuit of Optio...

Page 53: ...marks 1 Register 1 1kΩ ROHM 12 1 Capacitor 0 01µF Murata Manufacturing 12 2 General purpose pin header OQW 11 4 2 07PW Mac8 2 2 rows 14 poles Table 3 53 PWM connector pin assignment No Signal name I O Description 1 PWM0 O PWM CH0 2 PWM 1 O PWM CH1 3 PWM 2 O PWM CH2 4 PWM 3 O PWM CH3 5 PWM 4 O PWM CH4 6 PWM 5 O PWM CH5 7 PWM 6 O PWM CH6 8 PWM 7 O PWM CH7 9 PWM 8 O PWM CH8 10 PWM 9 O PWM CH9 11 PWM ...

Page 54: ...odel number Manufacturer Quantity Remarks 1 General purpose connector OQW 11 4 2 06PW Mac8 1 2 rows 12 poles Table 3 55 IrDA connector pin assignment No Signal name I O Description 1 XIN I 2 IRTX O 3 IRRX1 I 4 ID0 I 5 ID1 I 6 ID2 I 7 ID3 I 8 IRSL0 O 9 IRSL1 O 10 IRSL2 O 11 GND Ground 12 GND Ground Remark The physical pin assignment is the same as the general purpose pin header ...

Page 55: ...No Signal name I O Description 1 XDRESET O 23 XDIOW O 2 GND Ground 24 GND Ground 3 DD7 B 25 XDIOR O 4 DD8 B 26 GND Ground 5 DD6 B 27 DIORDY I 6 DD9 B 28 CSEL I 7 DD5 B 29 XDDMACK O 8 DD10 B 30 GND Ground 9 DD4 B 31 DINTRQ I 10 DD11 B 32 XIOCS16 O 11 DD3 B 33 DA1 O 12 DD12 B 34 XCBLID O 13 DD2 B 35 DA0 O 14 DD13 B 36 DA2 O 15 DD1 B 37 XDCS0 O 16 DD14 B 38 XDCS1 O 17 DD0 B 39 XDASP I 18 DD15 B 40 GN...

Page 56: ...ngle W25Q32BVSSIG Winbond 1 32Mbit 3 3 12 I2C The Option board has 3 channels Ch2 Ch4 as the I2C interface This interface is connected to the general purpose pin header I2C2 I2C3 and I2C3 I2C4 can be looped by the jumper pin The correspondence of the I2C channel and the connector is as follows Ch2 CN14 Ch3 CN15 Ch4 CN16 Table 3 60 I2C No Item Model number Manufacturer Quantity Remarks 1 General pu...

Page 57: ...ector pin assignment No Item Model number Manufacturer Quantity Remarks 1 ADC connector FFC 2ASM1 HONDA TSUSHIN 1 2 rows 10 poles Table 3 64 General purpose ADC connector pin assignment No Signal name I O Description 1 VIN0 I Analog input CH0 2 VR0 O Reference voltage output CH0 3 VRH0 I High side voltage input CH0 4 VRL0 I Low side voltage input CH0 5 VIN1 I Analog input CH1 6 VR1 O Reference vol...

Page 58: ... TS11 I O 13 GND Ground 14 GND Ground Remark The physical pin assignment is the same as the general purpose pin header 3 3 15 External INT The Option board has 7 channels as the External INT interface The 5 ports are connected to a general purpose connector CN36 Table 3 67 EIRQ No Item Model number Manufacturer Quantity Remarks 1 General purpose pin header OQW 11 4 2 04PW Mac8 1 2 rows 8 poles Tab...

Page 59: ...erface 4 1 CPU Base board I F The CPU board and the Base board are connected by two 160pin stack connectors Table 4 1 CPU Base board I F No Item Model number Manufacturer Quantity Remarks 1 Connector receptacle 52837 1679 Molex 2 Base Board 2 Connector header 53647 1674 Molex 2 CPU Board ...

Page 60: ... A14 DISP0CLKO B14 DISP0CLKI A15 DISP0CLKOX B15 GND A16 GND B16 DISP0DE A17 N C B17 DISP0GV A18 MEM_MNREX B18 MEM_XWR3 A19 MEM_MNWEX B19 MEM_XWR2 A20 MEM_ALE B20 MEM_XWR1 A21 MEM_CLE B21 MEM_XWR0 A22 MEM_RDY B22 GND A23 MEM_XRD B23 MEM_CLK A24 GND B24 GND A25 MEM_ED31 B25 MEM_ED23 A26 MEM_ED30 B26 MEM_ED22 A27 MEM_ED29 B27 MEM_ED21 A28 MEM_ED28 B28 MEM_ED20 A29 MEM_ED27 B29 MEM_ED19 A30 MEM_ED26 B...

Page 61: ...ED4 A52 MEM_ED11 B52 MEM_ED3 A53 MEM_ED10 B53 MEM_ED2 A54 MEM_ED9 B54 MEM_ED1 A55 MEM_ED8 B55 MEM_ED0 A56 MEM_XCS0 B56 MLB_SIG A57 MEM_XCS1 B57 MLB_DATA A58 MEM_XCS2 B58 MLB_CLK A59 GND B59 GND A60 CAN0_TX B60 CAN0_RX A61 CAN1_TX B61 CAN1_RX A62 GND B62 SPI0_SS A63 SPI0_SCK B63 SPI0_DO A64 GND B64 SPI0_DI A65 I2C0_SCL B65 I2C0_SDA A66 I2C1_SCL B66 I2C1_SDA A67 INT_A0 B67 INT_A4 A68 INT_A1 B68 INT_...

Page 62: ...A14 USART2_SOUT B14 USART3_SOUT A15 USART2_SIN B15 USART3_SIN A16 USART4_SCK B16 USART5_SCK A17 USART4_SOUT B17 USART5_SOUT A18 USART4_SIN B18 USART5_SIN A19 PWM_O6 B19 PWM_O8 A20 PWM_O7 B20 GND A21 GND B21 GND A22 SD0DAT0 B22 SD0DAT2 A23 SD0DAT1 B23 SD0DAT3 A24 ISD0CD B24 ISD0WP A25 SD0CMD B25 OSDCLK0 A26 I2S0_SDO B26 I2S1_SDO A27 I2S0_SDI B27 I2S1_SDI A28 I2S0_WS B28 I2S1_WS A29 I2S0_SCK B29 I2S...

Page 63: ... CAP2VI_5 A53 CAP2VI_2 B53 CAP2VI_6 A54 CAP2VI_3 B54 CAP2VI_7 A55 CAP1VI_0 B55 CAP1VI_4 A56 CAP1VI_1 B56 CAP1VI_5 A57 CAP1VI_2 B57 CAP1VI_6 A58 CAP1VI_3 B58 CAP1VI_7 A59 GND B59 GND A60 CAP0CLK B60 CAP1CLK A61 GND B61 GND A62 CAP0R0 B62 CAP0R4 A63 CAP0R1 B63 CAP0R5 A64 CAP0R2 B64 CAP0R6 A65 CAP0R3 B65 CAP0R7 A66 GND B66 GND A67 CAP0G0 B67 CAP0G4 A68 CAP0G1 B68 CAP0G5 A69 CAP0G2 B69 CAP0G6 A70 CAP0...

Page 64: ...Base Option board I F The Base board and the Option board are connected by 160pin stack connector Table 4 4 Base Option board I F No Item Model number Manufacturer Quantity Remarks 1 Connector receptacle 52837 1679 Molex 2 Base board 2 Connector header 53647 1674 Molex 2 Option board ...

Page 65: ... B12 SD1DATA2 A13 ISD1CD B13 SD1DATA3 A14 GND B14 GND A15 GND B15 GND A16 GND B16 GND A17 AD_VIN0 B17 AD_VRH0 A18 AD_VR0 B18 AD_VRL0 A19 AD_VIN1 B19 AD_VRH1 A20 AD_VR1 B20 AD_VRL1 A21 GND B21 GND A22 GND B22 GND A23 GND B23 GND A24 DISP2B7 B24 DISP0R7 A25 DISP2B6 B25 DISP0R6 A26 DISP2B5 B26 DISP0R5 A27 DISP2B4 B27 DISP0R4 A28 DISP2B3 B28 DISP0R3 A29 DISP2B2 B29 DISP0R2 A30 DISP2B1 B30 DISP0R1 A31 ...

Page 66: ... GND B52 GND A53 GND B53 DISP0DE A54 I2S1_SCL B54 DISP0HD A55 I2S1_SDA B55 DISP0VD A56 GND B56 GND A57 DISP2GV B57 DISP1R7 A58 DISP2DE B58 DISP1R6 A59 DISP2CSYNC B59 DISP1R5 A60 DISP2VD B60 DISP1R4 A61 DISP2HD B61 DISP1R3 A62 GND B62 GND A63 DISP2CKO B63 A64 GND B64 GND A65 DISP1VD B65 DISP1R2 A66 DISP1HD B66 DISP1R1 A67 DISP1DE B67 DISP1R0 A68 GND B68 GND A69 DISP1B0 B69 DISP1G7 A70 DISP1B1 B70 D...

Page 67: ...RT1_SOUT A14 USART0_SIN B14 USART1_SIN A15 USART2_SCK B15 USART3_SCK A16 USART2_SOUT B16 USART3_SOUT A17 USART2_SIN B17 USART3_SIN A18 GND B18 GND A19 SPI1HOLD B19 SPI1SCK A20 SPI1DO B20 SPI1SS A21 SPI1DI B21 GND A22 GND B22 GND A23 INT_A2 B23 INT_A5 A24 B24 INT_A6 A25 INT_A4 B25 INT_A7 A26 GND B26 GND A27 GND B27 I2S3SCK A28 I2S3WS B28 I2S3SDI A29 I2S3ECLK B29 I2S3SDO A30 GND B30 GND A31 USART4_S...

Page 68: ...SP1VI_1 B52 DISP1VI_5 A53 DISP1VI_2 B53 DISP1VI_6 A54 DISP1VI_3 B54 DISP1VI_7 A55 GND B55 GND A56 GND B56 DISP1CLK A57 GND B57 GND A58 CAN1_TX B58 CAN1_RX A59 GND B59 GND A60 I2S2 B60 I2S3 A61 GND B61 GND A62 CAP1CLK B62 CAP1VI_0 A63 GND B63 CAP1VI_1 A64 CAP1VI_4 B64 CAP1VI_2 A65 CAP1VI_5 B65 CAP1VI_3 A66 QUADSPI0_A B66 GND A67 QUADSPI0_B B67 PWM4_5 A68 PWM6_8 B68 PWM0_3 A69 INT4_7 B69 I2C2 A70 IN...

Page 69: ...re Manual 4 3 Customer I F The Base board and the Customer s board are connected by 100pin connector Table 4 7 Connector for Customer s board connection CN38 No Item Model number Manufacturer Quantity Remarks 1 Right angle connector 87BFN100R 3F KEL 1 Receptacle ...

Page 70: ..._ED21 B 69 MEM_ED28 B 70 MEM_ED20 B 67 MEM_ED27 B 68 MEM_ED19 B 65 MEM_ED26 B 66 MEM_ED18 B 63 MEM_ED25 B 64 MEM_ED17 B 61 MEM_ED24 B 62 MEM_ED16 B 59 GND 60 GND 57 MEM_EA26 O 58 MEM_EA13 O 55 MEM_EA25 O 56 MEM_EA12 O 53 MEM_EA24 O 54 MEM_EA11 O 51 MEM_EA23 O 52 MEM_EA10 O 49 MEM_EA22 O 50 MEM_EA9 O 47 MEM_EA21 O 48 MEM_EA8 O 45 GND 46 GND 43 MEM_EA20 O 44 MEM_EA7 O 41 MEM_EA19 O 42 MEM_EA6 O 39 M...

Page 71: ...Table 4 8 Customer s board connector 2 2 No Name I O No Name I O 19 GND 20 GND 17 MEM_ED11 B 18 MEM_ED3 B 15 MEM_ED10 B 16 MEM_ED2 B 13 MEM_ED9 B 14 MEM_ED1 B 11 MEM_ED8 B 12 MEM_ED0 B 9 GND 10 INT_A7 7 MEM_XCS0 O 8 XSRST1 5 MEM_XCS1 O 6 MEM_XCS2 O 3 GND 4 GND 1 GND 2 GND ...

Page 72: ...00000 0xE3FFFFFF NAND Flash 256MB 0xE0000000 0xEFFFFFFF Cannot used CS 1 Bus width 16bit 32bit FPGA 4KB 0xEC000000 0xEC000FFF CS 2 Bus width 16bit Customer External board 0xE8000000 0xEBFFFFFF 5 2 FPGA register 5 2 1 FPGA register list Table 5 2 register list Address h Name Function 00 VERSION Version register 04 PINMUX PINMUX register 08 DEVICE_SEL DEVICE_SEL register 0C FF ACC_TEST Test register...

Page 73: ...er VERSION 00h bit 31 30 29 28 27 26 25 24 R W R Initial 0000_0000 Name Reserved bit 23 22 21 20 19 18 17 16 R W R Initial 0000_0000 Name Reserved bit 15 14 13 12 11 10 9 8 R W R Initial xxxx_xxxx Name Version bit 7 6 5 4 3 2 1 0 R W R Initial xxxx_xxxx Name Revision Revison bit7 0 FPGA Revision Version bit15 8 FPGA Version ...

Page 74: ...al 0000 xxx x Name Reserved G_I G_H bit 23 22 21 20 19 18 17 16 R W R R R Initial xx xxx xxx Name G_H G_G G_F bit 15 14 13 12 11 10 9 8 R W R R R R Initial 0 xxx xxx x Name Reser ved G_E G_D G_C bit 7 6 5 4 3 2 1 0 R W R R R Initial xx xxx 000 Name G_C G_B Reserved The read value of PINMUX is changed by the DIPSW setting 000 mode0 001 mode1 010 mode2 011 mode3 100 mode4 101 mode5 ...

Page 75: ...ute ON L G_D bit11 9 SW_ED 1 Base Board SW11 set value SW_ED 1 ON mode0 000 OFF mode5 101 G_E bit14 12 SW_ED 6 4 Base Board SW11 set value Read attribute ON L G_F bit18 16 SW_GF 3 1 Base Board SW12 set value Read attribute ON L G_G bit21 19 SW_GF 6 4 Base Board SW12 set value Read attribute ON L G_H bit24 22 SW_IH 3 1 Base Board SW14 set value Read attribute ON L G_I bit27 25 SW_IH 6 4 Base Board ...

Page 76: ... Name Reserved MPXMODE 2 bit 15 14 13 12 11 10 9 8 R W R Initial xxxx_xxxx Name DEVICE_SEL bit 7 6 5 4 3 2 1 0 R W R R R R Initial 0000 x 0 xx Name Reserved SELFL Reserved MPXMODE 1 0 MPXMODE 1 0 bit1 0 MPXMODE 1 0 CPU Board SW3 set value Read attribute ON H SELFL bit2 SELFL CPU Board SW1 set value Read attribute NOR L DEVICE_SEL bit15 8 DEVICE_SEL Base Board SW19 set value Read attribute ON L MPX...

Page 77: ...ACC_TEST bit 23 22 21 20 19 18 17 16 R W R W Initial 0000_0000 Name ACC_TEST Bit 15 14 13 12 11 10 9 8 R W R W Initial 0000_0000 Name ACC_TEST Bit 7 6 5 4 3 2 1 0 R W R W Initial 0000_0000 Name ACC_TEST ACC_TEST bit31 0 Access Test register Setting of the SW19 DEVICE_SEL bit 8 6 ON ON OFF The access except the above setting is Hi Z Address is 1 word It is overwrited when writing at a different add...

Page 78: ...cycle RIDLC 0 1cycle WACC 2 3cycle WADC 0 1cycle WWEC 0 1cycle WIDLC 0 1cycle MEM_EA 11 0 MEM_ED 31 0 0XX 0XX Read Data Write Data MEM_XWRx RIDLC WIDLC Figure 5 1 Access timing Remarks The frequency of MEM_CLK is 100MHz less The half word and word can be access FPGA is the connection of MEM_EA 11 1 MEM_EA 26 12 is not decode The register of 00 08h address can be read any time The judgment of the 1...

Page 79: ...1 Allocation of peripheral resource and I2C port Peripheral resource I2C port Group Slave address Remarks Control 0100000 CAP0_VDEC VBI 0010000 ALSB 0 Control 0100001 CAP1_VDEC VBI 0010010 ALSB 1 DISP0_VDAC 0101010 ALSB 0 DISP0_DVI 0111000 Low order 3 bits are variable DISP1_DVI 0111001 Low order 3 bits are variable CH0 AMP AUDIO 0011010 Control 0100000 CAP2_VDEC VBI 0010000 ALSB 0 Control 0100001...

Page 80: ...74 10 Power system diagram MB86R11 Evaluation Board MB86R11EVB Hardware Manual 7 Power system diagram The power system diagram is shown as follows Figure 7 1 Power system diagram of Base board ...

Page 81: ...ystem diagram MB86R11 Evaluation Board MB86R11EVB Hardware Manual The power supply of 5V and 3 3V is supplied from the Base board to CPU board through the stack connector Figure 7 2 Power system diagram of CPU board ...

Page 82: ...em diagram MB86R11 Evaluation Board MB86R11EVB Hardware Manual The power supply of 5V and 3 3V is supplied from the Base board to Option board through the stack connector Figure 7 3 Power system diagram of Option board ...

Page 83: ... 11 Clock system diagram MB86R11 Evaluation Board MB86R11EVB Hardware Manual 8 Clock system diagram The clock system diagram of MB86R11EVB is shown as follows Figure 8 1 Clock system diagram of MB86R11EVB ...

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