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9. Allocation of peripheral resource
and I2C port
MB86R11
Evaluation Board
MB86R11EVB Hardware Manual
5. Memory map
5.1.
MB86R11EVB memory map
MB86R11EVB memory map is shown as follows.
Table 5-1 Memory map
Class
Attributes
Device
Physical Address
Remarks
SFI0
EEPROM
(32KB)
0x06000000-0x06007FFF
SFI1
SPI-FLASH
(4MB)
0x16000000-0x163FFFFF
SDRAM bus
Bus width=32bit
DDR2 (256MB)
0x40000000-0x47FFFFFF
External bus
CS0#
Bus width=16bit
Nor Flash (64MB)
0xE0000000-0xE3FFFFFF
NAND Flash (256MB)
0xE0000000-0xEFFFFFFF
Cannot used
CS#1
Bus
width=16bit/32bit
FPGA
(4KB) 0xEC000000-0xEC000FFF
CS#2
Bus width=16bit
Customer External board
0xE8000000-0xEBFFFFFF
5.2.
FPGA register
5.2.1.
FPGA register list
Table 5-2 register list
Address[h]
Name
Function
00 VERSION
Version
register
04 PINMUX
PINMUX
register
08 DEVICE_SEL
DEVICE_SEL
register
0C
～
FF
ACC_TEST
Test register (*)
* Setting of the SW19(DEVICE_SEL) bit[8:6]=[ON,ON,OFF].
Address is 1 word. It is overwrited when writing at a different address.
Table 5-3 Access type
meaning
Sign
Read
Write
R/W possible
possible
R possible
Invalid
Read/Write value of the reserved bit is 0.
