376
CHAPTER 13 8/10-bit A/D converter
13.5.5
A/D-converted Data Protection Function
A/D conversion with the output an interrupt request enabled activates the A/D
conversion data protection function.
■
A/D-converted Data Protection Function in 8-/10-bit A/D Converter
The 8-/10-bit A/D converter has only one A/D data register (ADCR) for holding A/D-converted data.
When the results of A/D conversion are determined upon completion, data in the A/D data register is
updated.Therefore, the A/D conversion results may be lost if the A/D conversion results already stored are
not read before data in the A/D data register is rewritten.The A/D-converted data protection function in the
8-/10-bit A/D converter is activated to prevent data loss. This function automatically causes A/D
conversion to pause when an interrupt request is generated (ADCS: INT = 1) with an interrupt request
enable
●
A/D-converted data protection function when EI
2
OS not used
•
When the A/D conversion results are stored in the A/D data register (ADCR) after the analog input is A/
D-converted, the interrupt request flag bit in the A/D control status register (ADCS: INT) is set to "1".
•
A/D conversion pauses for data protection while the interrupt request flag bit in the A/D control status
register (ADCS: INT) is set.
•
When the INT bit is set with an interrupt request from the A/D control status register enabled (ADCS:
INTE = 1), an interrupt request is generated.When the INT bit is cleared by the generated interrupt
processing, the pause of A/D conversion is cancelled.
●
A/D-converted data protection function when EI
2
OS used
•
A/D conversion pauses for data protection while the EI
2
OS function is used to transfer the A/D
conversion results to memory from the A/D data register after A/D conversion.When A/D conversion
pauses, the pause flag bit in the A/D control status register (ADCS: PAUS) is set to "1".
•
When the transfer of the A/D conversion results to memory by the EI
2
OS function is terminated, the
pause of A/D conversion is cancelled and the pause flag bit (ADCS: PAUS) is cleared to "0". If A/D
conversion is performed continuously, it is restarted.
Summary of Contents for F2MC-16LX Series
Page 2: ......
Page 3: ...FUJITSU LIMITED F2MC 16LX 16 bit Microcontroller MB90895 series Hardware Manual ...
Page 4: ......
Page 8: ...iv ...
Page 10: ...vi ...
Page 36: ...18 CHAPTER 2 HANDLING DEVICES ...
Page 176: ...158 CHAPTER 3 CPU ...
Page 224: ...206 CHAPTER 5 Timebase timer ...
Page 294: ...276 CHAPTER 8 16 bit reload timer ...
Page 366: ...348 CHAPTER 12 DTP external interrupt ...
Page 398: ...380 CHAPTER 13 8 10 bit A D converter ...
Page 446: ...428 CHAPTER 14 UART0 ...
Page 588: ...570 CHAPTER 17 Address Match Detecting Function ...
Page 626: ...608 CHAPTER 19 512 KBIT FLASH MEMORY ...
Page 676: ...658 APPENDIX Table A 9 3 Bit Operation Instruction Map first byte 6CH ...
Page 678: ...660 APPENDIX Table A 9 5 2 byte Instruction Map first byte 6FH MUL MULW DIVU A A A ...
Page 680: ...662 APPENDIX Table A 9 7 ea Instruction 2 first byte 71H ...
Page 681: ...663 APPENDIX A Instructions Table A 9 8 ea Instruction 3 first byte 72H ...
Page 682: ...664 APPENDIX Table A 9 9 ea Instruction 4 first byte 73H ...
Page 683: ...665 APPENDIX A Instructions Table A 9 10 ea Instruction 5 first byte 74H ...
Page 684: ...666 APPENDIX Table A 9 11 ea Instruction 6 first byte 75H ...
Page 685: ...667 APPENDIX A Instructions Table A 9 12 ea Instruction 7 first byte 76H ...
Page 686: ...668 APPENDIX Table A 9 13 ea Instruction 8 first byte 77H ...
Page 687: ...669 APPENDIX A Instructions Table A 9 14 ea Instruction 9 first byte 78H ...
Page 688: ...670 APPENDIX Table A 9 15 MOVEA RWi ea Instruction first byte 79H ...
Page 689: ...671 APPENDIX A Instructions Table A 9 16 MOV Ri ea Instruction first byte 7AH ...
Page 690: ...672 APPENDIX Table A 9 17 MOVW RWi ea Instruction first byte 7BH ...
Page 691: ...673 APPENDIX A Instructions Table A 9 18 MOV ea Ri Instruction first byte 7CH ...
Page 692: ...674 APPENDIX Table A 9 19 MOVW ea Rwi Instruction first byte 7DH ...
Page 693: ...675 APPENDIX A Instructions Table A 9 20 XCH Ri ea Instruction first byte 7EH ...
Page 694: ...676 APPENDIX Table A 9 21 XCHW RWi ea Instruction first byte 7FH ...
Page 710: ......