Application Note
AN_289 FT51A Programming Guide
Version 1.0
Document Reference No.: FT_000962 Clearance No.: FTDI# 483
54
Copyright © 2015 Future Technology Devices International Limited
2.7.7
UART_RX_IEN
Bit
Position
Bit Field Name
Type
Reset
Description
7..5
Reserved
RFU
0
Reserved
4
break_rcvd_ien
R/W
0
Enable bit for
break_rcvd_int
interrupt
3
stop_error_ien
R/W
0
Enable bit for
stop_error_int
interrupt
2
parity_error_ien
R/W
0
Enable bit for
parity_error_int
interrupt
1
rx_overflow_ien
R/W
0
Enable bit for
rx_overflow_int
interrupt
0
rx_full_ien
R/W
0
Enable bit for
rx_full_int
interrupt
Table 2.62 UART Receive Status Interrupt Enable Register
2.7.8
UART_RX_INT
Bit
Position
Bit Field Name
Type
Reset
Description
7..5
Reserved
RFU
0
Reserved
4
break_rcvd_int
R/W
0
The interrupt bit is set when the
receive data line is held at ‘0’ for
more than the time it takes to send a
full word
3
stop_error_int
R/W
0
The interrupt bit is set to indicate that
the last bit received was not a stop bit
2
parity_error_int
R/W
0
The interrupt bit is set to indicate
there was a parity error with the data
received
1
rx_overflow_int
R/W
0
The interrupt indicates that data has
been received but the Rx Buffer had
not been emptied from the previous
transaction
0
rx_full_int
R/W
0
The interrupt indicates that the Rx
Data Register contains received data
Table 2.63 UART Receive Status Interrupt Register
