Table 2-5. Ethernet port locations
Ethernet in
Linux
EC number
Interface voltage
PHY address
Connector location (from
chassis/board back)
Status indicator
eth2
EC1
LVDD (1.8 V)
1
Bottom
• R: Transmit or
receive activity
• L: Link
eth3
EC2
LVDD (1.8 V)
2
Top
• R: Transmit or
receive activity
• L: Link
2.4.1 MII buses
The LS1043ARDB has two media-independent interface (MII) management buses (EMI1
and EMI2) that are used to control two separate PHY transceiver devices. The MII buses
are connected to the Realtek, QSGMII, and Aquantia AQR105-B1 PHYs. The figure
below shows how the PHY devices are connected to the MII management buses.
Chapter 2 Interfaces
QorIQ LS1043A Reference Design Board Reference Manual, Rev. 0, 08/2015
Freescale Semiconductor, Inc.
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