MSC8144E Reference Manual, Rev. 3
Freescale Semiconductor
7-1
Clocks
7
The clock circuits generate the clocks for the cores, the internal CLASS buses, the QUICC
Engine subsystem, the PCI interface, the TDM, internal memory, the DDR-SDRAM memory
controller, and SERDES interface for the RapidIO controller. The clock generation components
and clock scheme are shown in Figure 7-1. The PLL0 input is the
CLKIN
signal generated from a
crystal-based oscillator. The PLL1 input can be the
CLKIN
signal or the output from PLL0. The
PLL2 input can be the
CLKIN
signal or the
PCI_CLK_IN
(PCI bus clock input) signal. Each PLL uses
its input clock to generate a fast clock that is synchronized to the input clock. The fast clock is
distributed to each of the clock dividers to generate the clocks that are distributed to the system
blocks. The clock circuits are locked, according to the selected clock mode, when the first stage
of the system reset configuration is done (reset configuration is controlled by the RESET block).
Figure 7-1. MSC8144E Clock Scheme
CLKIN
DIV
PLL1 = Core PLL
PLL0 = System PLL
PLL
DIV
DIV
DIV
DIV
PLL
DIV
DIV
DIV
DIV
PLL
DIV
DIV
PLL2 = Global PLL
serdes PLL
PCI_CLK_IN
Serial RapidIO_REF_CLK
SERDESCLK
Clock 5 to DSP core subsystem 0
Clock 6 to DSP core subsystem 1
Clock 7 to DSP core subsystem 2
Clock 8 to DSP core subsystem 3
Clock 0
Clock 1
Clock 3 to QUICC Engine
Clock 10 CLKOUT source 2/
Clock 11 DDR clock source 0
Clock 12 M3 clock source 0
Clock 4 PCI clock source 1
SerDes PLL = SerDes Clock
PCMR1[CAS]
PCMR2[CAS]
DIV
Clock 9 CLKOUT source 1
DIV
Clock 2 CLKOUT source 0
Note: The source for CLKOUT is selected at reset via the Reset Configuration Word (RCW). See Chapter 5, Reset for details.
CLASS clocks
subsystem
PCI clock source 0
Summary of Contents for MSC8144E
Page 1: ...MSC8144E Reference Manual Quad Core Media Signal Processor MSC8144ERM Rev 3 July 2009 ...
Page 48: ...MSC8144E Reference Manual Rev 3 xlviii Freescale Semiconductor ...
Page 86: ...MSC8144E Reference Manual Rev 3 1 38 Freescale Semiconductor Overview ...
Page 168: ...MSC8144E Reference Manual Rev 3 3 60 Freescale Semiconductor External Signals ...
Page 242: ...MSC8144E Reference Manual Rev 3 5 26 Freescale Semiconductor Reset ...
Page 314: ...MSC8144E Reference Manual Rev 3 8 24 Freescale Semiconductor General Configuration Registers ...
Page 414: ...MSC8144E Reference Manual Rev 3 10 14 Freescale Semiconductor MSC8144E SC3400 DSP Subsystem ...
Page 452: ...MSC8144E Reference Manual Rev 3 11 38 Freescale Semiconductor Internal Memory Subsystem ...
Page 520: ...MSC8144E Reference Manual Rev 3 12 68 Freescale Semiconductor DDR SDRAM Memory Controller ...
Page 1070: ...MSC8144E Reference Manual Rev 3 21 28 Freescale Semiconductor Timers ...