Enhanced Serial Communication Interface (eSCI)
MPC5565 Microcontroller Reference Manual, Rev. 1.0
20-16
Freescale Semiconductor
4–7
T
n
Timeout bit
n
. Sets the counter to determine a NO_RESPONSE_ERROR, if the frame is a read access to a LIN
slave. Following LIN standard rev 1.3, the value (10
×
N
DATA
+ 45)
×
1.4 is recommended. For transmissions, this
counter has to be set to 0. The timeout bits 7–0 are not written on a TX frame. For TX frames, the fourth byte written
to the LIN transmit register (ESCI
x
_LTR) is the first data byte, for RX frames it contains timeout bits 7–0.The time is
specified in multiples of bit times. The timeout period starts with the transmission of the LIN break character.
8–31
Reserved.
Table 20-11. ESCI
x
_LTR Rx Frame Fourth Byte Field Description
Field
Description
0–7
T
n
Timeout bit
n
. Sets the counter to determine a NO_RESPONSE_ERROR, if the frame is a read access to a LIN
slave. Follow the LIN standard rev 1.3, the value (10
×
N
DATA
+ 45)
×
1.4. For transmissions, this counter must be set
to 0. The timeout bits 7–0 are not written on a TX frame. For TX frames, the fourth byte written to the LIN transmit
register (ESCI
x
_LTR) is the first data byte. For RX frames, it contains timeout bits 7–0.The time is specified in
multiples of bit times. The timeout period starts with the transmission of the LIN break character.
8–31
Reserved.
Table 20-12. ESCI
x
_LTR Tx Frame Byte/
Rx Frame Fifth+ Byte Field Description
Field
Description
0–7
D
n
Data bits for transmission.
8–31
Reserved.
Table 20-10. ESCI
x
_LTR Third-Byte Field Descriptions (continued)
Field
Description
Summary of Contents for MPC5565
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