Freescale Semiconductor MPC5565, Reference Manual

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Enhanced Direct Memory Access (eDMA)
MPC5565 Microcontroller Reference Manual, Rev. 1.0
9-2 Freescale Semiconductor
Figure 9-1. eDMA Block Diagram
9.1.2 Features
The eDMA is a highly-programmable data transfer engine, which has been optimized to minimize the
required intervention from the host processor. It is intended for use in applications where the data size to
be transferred is statically known, and is
not defined within the data packet itself. The eDMA module
features:
• All data movement via dual-address transfers: read from source, write to destination
Programmable source, destination addresses, transfer size, plus support for enhanced addressing
modes
• 32-channel implementation performs complex data transfers with minimal intervention from a host
processor
— 32 bytes of data registers, used as temporary storage to support burst transfers
(refer to SSIZE bit)
— Connections to the crossbar switch for bus mastering the data movement
Sl
ave In
te
rface
eDMA
eDMA done
System B
u
s
Data path
Control
Address
Program model/
Slave write data
Slave write address
Bus write data
Slave read data
Bus address
eDMA Engine
TCD0
TCD n -1*
eDMA peripheral
Bus read data
channel arbitration
request
path
SRAM
Transfer Control Descriptor
(TCD)
SRAM
* n = 32 channels