I2Sx_TCSR field descriptions (continued)
Field
Description
Enables/disables transmitter operation in Debug mode. The transmit bit clock is not affected by debug
mode.
0
Transmitter is disabled in Debug mode, after completing the current frame.
1
Transmitter is enabled in Debug mode.
28
BCE
Bit Clock Enable
Enables the transmit bit clock, separately from the TE. This field is automatically set whenever TE is set.
When software clears this field, the transmit bit clock remains enabled, and this bit remains set, until the
end of the current frame.
0
Transmit bit clock is disabled.
1
Transmit bit clock is enabled.
27–26
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
25
FR
FIFO Reset
Resets the FIFO pointers. Reading this field will always return zero. FIFO pointers should only be reset
when the transmitter is disabled or the FIFO error flag is set.
0
No effect.
1
FIFO reset.
24
SR
Software Reset
When set, resets the internal transmitter logic including the FIFO pointers. Software-visible registers are
not affected, except for the status registers.
0
No effect.
1
Software reset.
23–21
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
20
WSF
Word Start Flag
Indicates that the start of the configured word has been detected. Write a logic 1 to this field to clear this
flag.
0
Start of word not detected.
1
Start of word detected.
19
SEF
Sync Error Flag
Indicates that an error in the externally-generated frame sync has been detected. Write a logic 1 to this
field to clear this flag.
0
Sync error not detected.
1
Frame sync error detected.
18
FEF
FIFO Error Flag
Indicates that an enabled transmit FIFO has underrun. Write a logic 1 to this field to clear this flag.
0
Transmit underrun not detected.
1
Transmit underrun detected.
Table continues on the next page...
Chapter 48 Integrated Interchip Sound (I2S) / Synchronous Audio Interface (SAI)
K22F Sub-Family Reference Manual , Rev. 3, 7/2014
Freescale Semiconductor, Inc.
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