Freescale Semiconductor MCF5329, Reference Manual, Page: 440 / 924

Universal Serial Bus Interface – Host Module
20-4 Freescale Semiconductor
20.2.1 USB Host Control and Status Signals
To minimize the pin-count on the device, a few USB host control and status signals are implemented
on-chip as bit fields in a register within the chip configuration module (CCM).
The host controller status register (UHCSR) is implemented as follows:
• Writes to the UHCSR register from the firmware set the corresponding bits on the USB interface.
• When the USB host module outputs change, the corresponding bits on the UHCSR register are
updated, and a maskable interrupt is generated.
The UHCSR register is documented in the CCM chapter, see Section 9.3.6, “USB Host Controller Status
Register (UHCSR).”
Table 20-1. USB Host External Signals
Signal I/O Description
USB_CLKIN I Optional 60 MHz clock source.
USBH_DM I/O
D- output of the dual-speed transceiver for the USB Host module.
State
Meaning
Asserted—Data 1
Negated—Data 0
Timing Asynchronous
USBH_DP I/O
D+ output of the dual-speed transceiver for the USB Host module.
State
Meaning
Asserted—Data 1
Negated—Data 0
Timing Asynchronous
USBH_VBUS_EN O
Enables off-chip charge pump controller of VBUS for the USB host module.
State
Meaning
Asserted—Off-chip charge pump controller enabled
Negated—Off-chip charge pump controller disabled
Timing Asynchronous
USBH_VBUS_OC I
Communicates short on USB lines occurred for USB host module.
State
Meaning
Asserted—Short detected
Negated—No short detected
Timing Synchronous to USB_CLKIN.
Table 20-2. Internal Control and Status Bits for USB Host Module
Signal Mnemonic Direction Access
Interrupt
Trigger?
Port Indicator LED
Control
PORTIND[1:0]
Selects LED color for product
package.
R N
Wake-up Event
WKUP
Reflects when a wake-up event has
occurred on the USB bus.
R/W Y
MCF5329 Reference Manual, Rev 3