Chapter 18 Real-Time Counter With Calendar (RTCV2)
S12ZVHY/S12ZVHL Family Reference Manual Rev. 1.05
Freescale Semiconductor
651
divider circuits generates compensation cycle periodic interrupt and 4 Hz periodic interrupt. Depend on
the CCS setting, the cycle period can be 5, 15, 30, 60 seconds. The COMPIE bit in the RTC control regis-
ter 4(RTCCTL4) can enable compensation cycle interrupt. When the compensation logic start at the last
second compensation cycle, it will generate the interrupt. And user can calculate the next compensation
value and update these registers.
When a 4 Hz time base tick happens, it indicated by TB0F flags. And a CPU interrupt request is gener-
ated if the corresponding interrupt enable is also set.
18.5.4 RTC Clock Compensation
The RTC module is built with compensation circuit. The circuit is used to compensate frequency errors of
the input RTC clock, so that a more accurate 1-Hz RTC clock output can be achieved. Using this method,
it is possible to use a less expensive crystal. If the crystal temperature profile and the current temperature
is known, the compensation circuit can also be used to compensate crystal frequency errors due to ambi-
ent temperature change and crystal aging.
The compensation logic use the RTCMOD, CCS and Q of RTCCCR to decide the free run timer counter.
User first need to decide the CCS, which determines the compensation precision. The larger CCS value,
higher the precision, longer the compensation period. During each compensation cycle, the free run timer
counter will first count 1 for Q times , then count RTCMOD for the “compensation peirod-Q”
times. Note if Q >= compensation period, it means that free run timer counter will count 1 for
“compensation period” times
The RTCMOD is the integral portion of actual frequency. Q value can be calculated base on
Section Table 18-14., “the CCS, precision and Q value”
First example, if the RTC clock is from OSCCLK_32K and it has 2000PPM frequence drift due to the
crystal and temperature etc factors, the RTCCLK frequency will be 32833.536HZ. We set RTCMOD
value to 32833 first. The fraction value will be 0.536, and we can get CCS=0, Q=3 or CCS=1, Q=8 or
CCS=2, Q=16 or CCS=3, Q=32.
Second example, if the RTC clock is from OSCLK and it has -2000PPM frequence drift due to the crystal
Table 18-14. the CCS, precision and Q value
CCS
Compensation
period (second)
Compensation Precision
Q
0
5
1/(2 * 5 * RTCMOD)
(1)
1. the RTCCLK has only two possible input frequency, 31.25KHz or 32.768KHz. If RTCMOD value is set as requirement, user
can use 31250 or 32768 to replace the RTCMOD value here to easy the compensation precision calculation.
integer of ((fraction value+1/(2*5)) * 5)
1
15
1/(2 * 15 * RTCMOD)
integer of ((fraction value+1/(2*15)) * 15)
2
30
1/(2 * 30 * RTCMOD)
integer of ((fraction value+1/(2*30)) * 30)
3
60
1/(2 * 60 * RTCMOD)
integer of ((fraction value+1/(2*60)) * 60)
