Chapter 7 S12 Clock, Reset and Power Management Unit (S12CPMU_UHV_V5)
S12ZVHY/S12ZVHL Family Reference Manual, Rev. 1.05
Freescale Semiconductor
237
7.2
Signal Description
This section lists and describes the signals that connect off chip as well as internal supply nodes and special
signals.
7.2.1
RESET
Pin RESET is an active-low bidirectional pin. As an input it initializes the MCU asynchronously to a
known start-up state. As an open-drain output it indicates that an MCU-internal reset has been triggered.
7.2.2
EXTAL and XTAL
These pins provide the interface for a crystal to control the internal clock generator circuitry. EXTAL is
the input to the crystal oscillator amplifier. XTAL is the output of the crystal oscillator amplifier. If
XOSCLCP is enabled, the MCU internal OSCCLK_LCP is derived from the EXTAL input frequency. If
OSCE=0, the EXTAL pin is pulled down by an internal resistor of approximately 200 k
and the XTAL
pin is pulled down by an internal resistor of approximately 700 k
.
NOTE
Freescale recommends an evaluation of the application board and chosen
resonator or crystal by the resonator or crystal supplier.
The loop controlled circuit (XOSCLCP) is not suited for overtone
resonators and crystals.
7.2.3
VSUP — Regulator Power Input Pin
Pin VSUP is the power input of VREGAUTO. All currents sourced into the regulator loads flow through
this pin.
A suitable reverse battery protection network can be used to connect VSUP to the car battery supply
network.
7.2.4
VDDA, VSSA — Regulator Reference Supply Pins
Pins VDDA and VSSA
,
are used to supply the analog parts of the regulator. Internal precision reference
circuits are supplied from these signals.
An off-chip decoupling capacitor (220 nF(X7R ceramic)) between VDDA and VSSA is required and can
improve the quality of this supply.
VDDA has to be connected externally to VDDX.
7.2.5
VDDX, VSSX — Pad Supply Pins
VDDX is the supply domain for the digital Pads.
An off-chip decoupling capacitor (10
F plus 220 nF(X7R ceramic)) between VDDX and VSSX is
required.
