S12ZVHY/S12ZVHL Family Reference Manual Rev. 1.05
Freescale Semiconductor
23
Chapter 1
Device Overview MC9S12ZVHY/MC9S12ZVHL Families
Table 1-1. Revision History
1.1
Introduction
The MC9S12ZVHY/MC9S12ZVHL Families are optimized automotive 16-bit microcontroller product
families, focused on low-cost, high-performance and application component count reduction. They
integrate many components of the MagniV mixed signal microcontroller S12ZVH-family, including a 5V
regulator system to supply the microcontroller and other components. The MC9S12ZVHY is targeted at
automotive and motorcycle instrument cluster applications requiring stepper motor gauges and segment
LCD displays. Please contact Freescale local representatives for advice on extremely safety constrained
applications. The MC9S12ZVHL is targeted at automotive and motorcycle instrument cluster applications
requiring stepper motor gauges, segment LCD displays and LIN communications.
The devices features a 4x40 liquid crystal display (LCD) controller/driver and a pulse width modulated
motor controller (MC) consisting of up to 16 high current outputs. The devices are capable of stepper
motor stall detection (SSD) via hardware or software, please contact Freescale sales office for detailed
information on software SSD.
The MC9S12ZVHY/MC9S12ZVHL Families deliver an optimized solution with the integration of several
key system components into a single device, optimizing system architecture and achieving significant PCB
space savings. These families deliver all the advantages and efficiencies of a 16-bit MCU while retaining
the low cost, power consumption, EMC, and code-size efficiency advantages currently enjoyed by users
of Freescale’s existing S12(X) MCU families. The MC9S12ZVHY/MC9S12ZVHL Families also feature
the revolutionary S12Z CPU with code size and execution efficiencies even higher than our class leading
S12X CPU. They also provides a linear memory map for all members of the family, eliminating the
inconvenience and performance impact of page swapping. In addition to the I/O ports available in each
module, further I/O ports are available with interrupt capability allowing wake-up from stop or wait
modes.
Version
Number
Revision
Date
Description of Changes
0.05
Sep 2012
• Update ADC conversion reference IFR location
• Correct 100LQFP pinout signals typos
• Fix base on review feedback
• Add FTMRZ related connection
0.06
Nov 2012
• Update for 1N39G
0.07
July 2013
• Add 32K device
0.08
Jan 2014
• Add ZVHL part
0.09
Jun 2015
• Added reference to safety constrained applications
• Corrected ADC reference result to right justified
