Freescale Semiconductor MC9S08PT60, Reference Manual

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16.4.10.3 SPTEF
SPTEF occurs when the SPI transmit buffer is ready to accept new data.
After SPTEF is set, it does not clear until it is serviced. SPTEF has an automatic clearing
process that is described in the SPI Status Register details.
16.4.10.4 SPMF
SPMF occurs when the data in the receive data buffer is equal to the data in the SPI
match register.
16.5 Initialization/Application Information
This section discusses an example of how to initialize and use the SPI.
16.5.1 Initialization Sequence
Before the SPI module can be used for communication, an initialization procedure must
be carried out, as follows:
1. Update control register 1 (SPIx_C1) to enable the SPI and to control interrupt
enables. This register also sets the SPI as master or slave, determines clock phase and
polarity, and configures the main SPI options.
2. Update control register 2 (SPIx_C2) to enable additional SPI functions such as the
SPI match interrupt feature, the master mode-fault function, and bidirectional mode
output and other optional features are controlled here as well.
3. Update the baud rate register (SPIx_BR) to set the prescaler and bit rate divisor for
an SPI master.
4. Update the hardware match register (SPIx_M) with the value to be compared to the
receive data register for triggering an interrupt if hardware match interrupts are
enabled.
5. In the master, read SPIx_S while SPTEF = 1, and then write to the transmit data
register (SPIx_D ) to begin transfer.
Chapter 16 8-Bit Serial Peripheral Interface (8-bit SPI)
MC9S08PT60 Reference Manual, Rev. 4, 08/2014
Freescale Semiconductor, Inc. 465