16.4.6.1 SS Output
The SS output feature automatically drives the SS pin low during transmission to select
external devices and drives the SS pin high during idle to deselect external devices. When
the SS output is selected, the SS output pin is connected to the SS input pin of the
external device.
The SS output is available only in master mode during normal SPI operation by asserting
the SSOE and MODFEN bits as shown in the description of the C1[SSOE] bit.
The mode fault feature is disabled while SS output is enabled.
Note
Be careful when using the SS output feature in a multimaster
system because the mode fault feature is not available for
detecting system errors between masters.
16.4.6.2 Bidirectional Mode (MOMI or SISO)
The bidirectional mode is selected when the SPC0 bit is set in SPI Control Register 2 (see
the following table). In this mode, the SPI uses only one serial data pin for the interface
with one or more external devices. The MSTR bit decides which pin to use. The MOSI
pin becomes the serial data I/O (MOMI) pin for the master mode, and the MISO pin
becomes serial data I/O (SISO) pin for the slave mode. The MISO pin in master mode
and MOSI pin in slave mode are not used by the SPI.
Table 16-15. Normal Mode and Bidirectional Mode
When SPE = 1
Master Mode MSTR = 1
Slave Mode MSTR = 0
Normal Mode
SPC0 = 0
MOSI
MISO
Serial Out
SPI
Serial In
MOSI
MISO
Serial Out
SPI
Serial In
Bidirectional Mode
SPC0 = 1
Serial Out
SPI
Serial In
MOMI
BIDIROE
Serial Out
SPI
Serial In
SISO
BIDIROE
The direction of each serial I/O pin depends on the BIDIROE bit. If the pin is configured
as an output, serial data from the shift register is driven out on the pin. The same pin is
also the serial input to the shift register.
The SPSCK is an output for the master mode and an input for the slave mode.
Functional Description
MC9S08PT60 Reference Manual, Rev. 4, 08/2014
460
Freescale Semiconductor, Inc.
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