Freescale Semiconductor MC9S08PT60, Reference Manual

Page: 444 / 679

In the external SPI system, simply connect all SPSCK pins to each other, all MISO pins
together, and all MOSI pins together. Peripheral devices often use slightly different
names for these pins.
ENABLE
SPI SYSTEM
SHIFT
OUT
SHIFT
DIRECTION
SHIFT
CLOCK Rx BUFFER
FULL
Tx BUFFER
EMPTY
SHIFT
IN
Tx BUFFER (WRITE SPIxD)
SPI SHIFT REGISTER
Rx BUFFER (READ SPIxD)
PIN CONTROL
MASTER CLOCK
SLAVE CLOCK
BUS RATE
CLOCK
SPIBR
CLOCK
GENERATOR
MASTER/SLAVE
MODE SELECT
CLOCK
LOGIC
MODE FAULT
DETECTION
8-BIT COMPARA-
SPIxMR
MASTER/
SLAVE
SPSCK
SS
S
M
S
M
S
M
MOSI
(MOMI)
MISO
(SISO)
INTERRUPT
REQUEST
SPE
LSBFE
MSTR
SPMF
SPMIE
SPTIE
SPIE
MODF
SPRF
SPTEF
MOD-
SSOE
SPC0
BIDIROE
Figure 16-2. SPI Module Block Diagram without FIFO
16.2 External Signal Description
The SPI optionally shares four port pins. The function of these pins depends on the
settings of SPI control bits. When the SPI is disabled (SPE = 0), these four pins revert to
other functions that are not controlled by the SPI (based on chip configuration).
External Signal Description
MC9S08PT60 Reference Manual, Rev. 4, 08/2014
444 Freescale Semiconductor, Inc.