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MC9S08JS16 MCU Series Reference Manual, Rev. 4
Freescale Semiconductor
243
Chapter 15
Universal Serial Bus Device Controller (S08USBV1)
15.1
Introduction
This section describes a universal serial bus (USB) module that is based on the
Universal Serial Bus
Specification Rev 2.0
. The USB bus is designed to replace existing bus interfaces such as RS-232, P/S2,
and IEEE 1284 for PC peripherals.
This USB module supports full-speed (FS) USB signaling including an interface to an on-chip FS USB
2.0 compatible transceiver. The on-chip USB transceiver is used with an on-chip 3.3-V voltage regulator.
This USB module also provides control options for both the on-chip USB transceiver and voltage
regulator.
15.1.1
Clocking Requirements
The S08USBV1 requires two clock sources, the 24 MHz bus clock and a 48 MHz reference clock. The
48 MHz clock is sourced directly from MCGOUT. To achieve the 48 MHz clock rate, the MCG must be
configured properly for PLL engaged external (PEE) mode with an external crystal.
For USB operation, examples of MCG configuration using PEE mode include:
•
2 MHz crystal — RDIV = 000 and VDIV = 0110
•
4 MHz crystal — RDIV = 001 and VDIV = 0110
15.1.2
Current Consumption in USB Suspend
In USB suspend mode, the S08USBV1 current consumption is limited to 500
μ
A. When the USB device
goes into suspend mode, the firmware typically enters stop3 to meet the USB suspend requirements on
current consumption.
NOTE
Enabling LVD increases current consumption in stop3. Consequently,
disabling LVD before entering stop3 to satisfy USB suspend requirements.
15.1.3
3.3 V Regulator
If using an external 3.3 V regulator as an input to V
USB33
(only when USBVREN = 0), the supply voltage,
V
DD
, must not fall below the input voltage at the V
USB33
pin. If using the internal 3.3 V regulator
(USBVREN = 1), do not connect an external supply to the V
USB33
pin. In this case, V
DD
must fall between
3.9 V and 5.0 V for the internal 3.3 V regulator to operate correctly.
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