![Freescale Semiconductor Energy Efficient Solutions Xtrinsic MMA8452Q Data Sheet: Technical Data Download Page 31](http://html1.mh-extra.com/html/freescale-semiconductor/energy-efficient-solutions-xtrinsic-mma8452q/energy-efficient-solutions-xtrinsic-mma8452q_data-sheet-technical-data_2330613031.webp)
MMA8452Q
Sensors
Freescale Semiconductor, Inc.
31
0x1F: TRANSIENT_THS Register
The Transient Threshold register sets the threshold limit for the detection of the transient acceleration. The value in the
TRANSIENT_THS register corresponds to a g value which is compared against the values of High-Pass Filtered Data. If the High-
Pass Filtered acceleration value exceeds the threshold limit, an event flag is raised and the interrupt is generated if enabled.
The threshold THS[6:0] is a 7-bit unsigned number, 0.063g/LSB. The maximum threshold is 8g. Even if the part is set to full
scale at 2g or 4g this function will still operate up to 8g. If the Low-Noise bit is set in Register 0x2A, the maximum threshold to be
reached is 4g.
Note:
If configuring the transient detection threshold for less than 1g, the high-pass filter will need some settling time. The settling
time will vary depending on selected ODR, high-pass frequency cutoff and threshold. For more information, please refer to
Freescale application note, AN4071.
0x20: TRANSIENT_COUNT
The TRANSIENT_COUNT sets the minimum number of debounce counts continuously matching the condition where the
unsigned value of high-pass filtered data is greater than the user specified value of TRANSIENT_THS.
The time step for the transient detection debounce counter is set by the value of the system ODR and the Oversampling mode.
0x1F: TRANSIENT_THS Register (Read/Write)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
DBCNTM
THS6
THS5
THS4
THS3
THS2
THS1
THS0
Table 33. TRANSIENT_THS Description
DBCNTM
Debounce counter mode selection. Default value: 0. 0: increments or decrements debounce; 1: increments or clears counter.
THS[6:0]
Transient Threshold: Default value: 000_0000.
0x20: TRANSIENT_COUNT Register (Read/Write)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
D7
D6
D5
D4
D3
D2
D1
D0
Table 34. TRANSIENT_COUNT Description
D[7:0]
Count value. Default value: 0000_0000.
Table 35. TRANSIENT_COUNT Relationship with the ODR
ODR (Hz)
Max Time Range (s)
Time Step (ms)
Normal
LPLN
HighRes
LP
Normal
LPLN
HighRes
LP
800
0.319
0.319
0.319
0.319
1.25
1.25
1.25
1.25
400
0.638
0.638
0.638
0.638
2.5
2.5
2.5
2.5
200
1.28
1.28
0.638
1.28
5
5
2.5
5
100
2.55
2.55
0.638
2.55
10
10
2.5
10
50
5.1
5.1
0.638
5.1
20
20
2.5
20
12.5
5.1
20.4
0.638
20.4
20
80
2.5
80
6.25
5.1
20.4
0.638
40.8
20
80
2.5
160
1.56
5.1
20.4
0.638
40.8
20
80
2.5
160