Force Computers PENT/CPCI-721, Installation Manual

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PENT/CPCI-720/2/3 Registers Maps and Registers
6 - 18 PENT/CPCI-721
I/O Board LED Control Register
The I/O board LED control register is implemented on-board the I/O
board via the General Purpose I/O register (GPIO) of the PCI-to-PCI-
bridge. The PCI-to-PCI-bridge with device number 19
10
(IDSEL 30
10
) is
located at PCI bus 0. The GPIO is integrated in the PCI configuration
space of this PCI-to-PCI-bridge at offset 64
16
. It controls the status of the
I/O board front panel user LED.
The front panel LED 4 of the I/O board is connected to GPIO3 of the
PCI-to-PCI-bridge on-board the I/O board.
Note: The bits denoted as ‘x’ in the following values must remain un-
altered.
LED Off
To switch off the user LED, set the GPIO register to the following value
via a 32-bit write access (from left to right 67
16
to 64
16
):
xxxx.xxxx.0001.0000.0000.0001.xxxx.xxxx
2
LED Green
To switch on the user LED, set the GPIO register to the following value
via a 32-bit write access (from left to right 67
16
to 64
16
):
xxxx.xxxx.0000.0001.0000.0001.xxxx.xxxx
2