FOR-A USF-101MDX4-12G Page 30 Operation Manual Download | Manualshive

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7-3. Network

Pressing

Network

displays the screen as shown below and allows you to set IP address and target

port of the controlling PC.
See Sec. 8.

“Command Control” for details.

7-4. Trap

7-4-1. SNMP Trap Settings

Sets SNMP Trap sending. When marked with



, traps are sent to SNMP manager. When

unmarked, traps are not sent out. See

Trap List

in Sec. 9.

“About SNMP” for details.

IMPORTANT

If FPGA2 temperature rises over 100

°

C and FPGA

２

power shutdown feature works. Traps

listed as below are not sent out regardless of the Temperature Alarm setting. FPGA2
Thermal Shutdown Trap is sent out.



Temperature Alarm

When FPGA2 temperature rises more than 90°C, a trap (FPGA2TEMP Warning) is sent
out at about 60-second intervals.



SDI Input

If SDI input signal video changes, a trap is sent out.



Genlock Input

If reference signal input changes, a trap is sent out.

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Summary of Contents for USF-101MDX4-12G

Page 1: ...USF 101MDX4 12G USF 101MDX8 12G Audio Multiplexer Demultiplexer 1st Edition Rev 2 OPERATION MANUAL ...

Page 2: ...ircuitry exposed could result in electric shock fire hazards or a unit malfunction Potential Hazards Caution If abnormal odors or noises are noticed coming from the unit immediately turn the power off and disconnect the power cord to avoid potentially hazardous conditions If problems similar to the above occur contact an authorized service representative before attempting to operate the unit again...

Page 3: ...red during shipment If damage has occurred or items are missing inform your supplier immediately USF 101MDX4 8 12G Box ITEM QTY REMARKS USF 101MDX4 12G USF 101MDX8 12G 1 set Front module Rear module Including 4 screws DVD ROM 1 Installation disc USF 101MDX4 8 12G USF GUI Launcher Windows GUI Launcher Including the following PDF manuals USF 101MDX4 8 12G Operation Manual USF GUI Launcher Operation ...

Page 4: ...t 19 4 2 3 Source Select 20 4 2 4 Input Delay 20 4 2 5 Sampling Rate Convert 21 4 2 6 Output Mapping 21 4 2 7 Monosum Downmix Test Signal 22 4 2 8 Embedded Gain 23 4 2 9 AES Gain 24 4 2 10 Embedded Output 24 4 2 11 Audio System 25 4 2 12 Audio Input Status 26 4 2 13 Audio Output Status 26 4 3 Event Tab 27 4 4 Status Tab 27 5 Items Not Stored in Event Memory 28 6 Last Settings Auto Save Feature 28 ...

Page 5: ...us Request Commands Audio 1 36 8 4 6 Status Request Commands Audio 2 37 8 4 7 Status Request Commands Payload ID 37 8 5 Command Responses 38 8 6 Status Messages from USF 101MDX4 8 12G module 38 8 6 1 Status Message Audio 1 39 8 6 2 Status Message Audio 2 40 8 6 3 Status Message Payload ID 40 8 7 Command Flow Description 41 8 7 1 Checking USF 101MDX4 8 12G Module Start up 41 8 7 2 Changing USF 101M...

Page 6: ... features 1 2 Features Latest 12G SDI interface USF 101MDX4 12G AES EBU input output with 4 BNCs 8 channels USF 101MDX8 12G AES EBU input output with 8 BNCs 16 channels Simultaneous audio multiplexing and de multiplexing LTC input output Up to 16 channel of SDI audio SDI embedding de embedding Downmix Mono sum mix and polarity change features Dedicated GUI remote control software web based control...

Page 7: ...ge setting 1 DS1 is installed under the top and bottom cards Inaccessible to change settings 2 3 Rear Panel USF 101MDX4 12G DIGITAL AUDIO IN OUT USF 101MDX4 12G SDI OUT LTC I O SDI IN 7 8 5 6 3 4 1 2 Name Description SDI IN Input terminal for 12G 3G HD SDI signal SDI OUT Output terminal for 12G 3G HD SDI signal DIGITAL AUDIO IN OUT 1 2 to 7 8 AES EBU input output connector Use 1 2 and 3 4 after se...

Page 8: ...2G 3G HD SDI signal DIGITAL AUDIO IN OUT 1 2 15 16 AES EBU input output connector Use 1 2 and 3 4 after setting input or output Use 5 6 and 7 8 after setting input or output Use 9 10 and 11 12 after setting input or output Use 13 14 and 15 16 after setting input or output See Sec 4 2 2 AES Input for details LTC I O LTC input output connector Use after setting input or output See Sec 4 1 4 2 Time C...

Page 9: ...rate the card See Sec 4 USF 101MDX4 8 12G GUI Windows GUI for details Event data import and export are available from PC Web browser See Sec 7 Web GUI for details Windows GUI software Web browser Ethernet Hub LAN port 192 168 0 50 255 255 255 0 USF 212AS Rear Reference Signal 75Ω Terminate USF 101MDX4 12G LAN1 192 168 0 10 255 255 255 0 AES Input LTC Input AES Output LTC Output 12G SDI Input 12G S...

Page 10: ... export are available from PC Web browser See Sec 7 Web GUI for details Windows GUI Software Web browser Ethernet Hub LAN port 192 168 0 50 255 255 255 0 Setup Operation Windows GUI software Event importing exporting Web browser USF 212AS Rear Reference Signal 75Ω Terminate LAN1 192 168 0 10 255 255 255 0 AES Input LTC Input AES Output LTC Output 12G SDI Input 12G SDI Output 12G SDI Output 12G SDI...

Page 11: ...al processing from which menu pages are opened Audio tab Shows a block diagram for the audio signal processing from which menu pages are opened Event tab Allows you to save load menu settings Status tab Displays the module information 4 1 Video Tab Selecting the Video tab shows the Video Block diagram Click blocks in the processing order to open menus and configure video processing Block name Refe...

Page 12: ...anual Inputs the input signal format manually to operate The following parameters are effective if Format Detection is set to Manual Standard 1080 720 1080 2160 Specifies the number of vertical pixels lines Frame Rate 59 94i 29 97PsF 59 94p 50p 29 97p 23 98p 59 94i 29 97PsF 50i 25PsF 23 98PsF Specifies the frame rate Selectable items after Standard selection are displayed If Standard setting is ch...

Page 13: ...ynchronizer in the Video Block diagram opens the following menu screen Item Default Setting Description Mode Frame Frame Line AVDL Line Min Selects the reference mode Frame Horizontal and vertical video signal adjustment referring to genlock signal Not necessary for video input and genlock to sync Line 1 2H horizontal video signal adjustment output with 1H delay Synchronization necessary for video...

Page 14: ...llary Multiplex Mode Overwrite Overwrite Pass Blank Selects the H ANC data insertion mode Overwrite Inserts the input HANC data in which audio and timecode data are rewritten Pass Inserts the input HANC data without processing Blank Clears HANC space and inserts only the rewritten input audio and timecode data Horizontal Ancillary Multiplex Payload ID Pass Pass Overwrite Selects the Payload ID ins...

Page 15: ...n LTC output A timecode generated by Time Code Generator LTC is output Time Code Generator LTC Time Code Generator VITC Item Default Setting Description Source ATC LTC ATC LTC ATC VITC LTC In Generator Selects the timecode source The timecode selected here is shown on Status ATC LTC LTC timecode inserted in the SDI input ATC VITC VITC timecode inserted in the SD SDI input LTC In LTC timecode input...

Page 16: ...gnal in the LTC I O terminal 4 1 5 Output Select Selecting Output Select in the Video Block diagram opens the following menu screen Item Default Setting Description SDI Operate Bypass Operate Bypass Video signals input in SDI IN are output from SDI OUT without processing 4 1 6 Video Status Selecting Video Status in the Video Block diagram opens the following screen showing video input status in th...

Page 17: ... Embedded Input 4 2 1 AES Input 4 2 2 Source Select 4 2 3 Input Delay 4 2 4 Sampling Rate Convert 4 2 5 Output Mapping 4 2 6 Monosum Downmix Test Signal 4 2 7 Embedded Gain 4 2 8 AES Gain 4 2 9 Embedded Output 4 2 10 Audio System 4 2 11 Audio Input Status 4 2 12 Audio Output Status 4 2 13 4 2 1 Embedded Input Selecting Embedded Input in the Audio Block diagram opens the following menu screen ...

Page 18: ...ock phase data Audio Clock Uses the audio clock phase data in the HD SDI input to de embed audio independently for each group Synchronous or asynchronous de embedding Error Sensing Normal Disable Normal Sensitive Selects the input audio error detection mode used for Error Fade below Disable Detects no errors for Error Fade Normally do not use Normal Detects SDI signal switching ADP Audio Data Pack...

Page 19: ... Disable Disable Group A Group B Selects AES input channel alignment Disable Disables channel alignment Group A B Adds the channel pair to a group A or B and aligns audio word timing within the channel group by referring to the smallest channel pair AES Error Detection Audio Mute Enable Disable Enable Enables disables audio mute if Unit Interval UI of preamble codes used for synchronization in AES...

Page 20: ... Delay in the Audio Block diagram opens the following menu screen Item Default Setting Description Adjust Video Delay Pressing Set adds the delay amount shown at left to Master Delay Pressing Unity sets the delay amount to default 5 msec Master 5 ms 5 to 1000 ms Sets the delay offset for all 16 channels Ch 1 16 5 ms 5 to 1000 ms Each channel delay amount sum of each delay and Master delay is displ...

Page 21: ...ss Avoids the SRC Use Bypass for non PCM audio Note that to embed non PCM audio to the SDI output audio group clock should be properly selected under Multiplex Clock see Sec 4 2 10 Embedded Audio Output SRC In Both PCM and non PCM audio is processed by SRC This is useful for irregular audio such as PCM audio content with non PCM metadata Note that SRC processed audio may not be played properly if ...

Page 22: ...osum Downmix Test Signal in the Audio Block diagram opens the following menu screen If Downmix is selected Item Default Setting Description Downmix Mode Stereo Stereo Surround Monaural Selects the Downmix mode Mix Level Surround 3dB 3dB 6dB 9dB Off Sets the Ls Rs Surround channels level Setting to Off removes the Ls Rs channels from mixing sources Mix Level Center 3dB 3dB 4 5 dB 6dB Sets the C Cen...

Page 23: ...lt Setting Description Master Mute Disable Disable Enable Selecting Enable mutes all the audio signals Test Tone SDI Off Off 500Hz Tone 1kHz Tone Allows you to assign an audio test signal to the embedded audio on the SDI output Test Tone AES Off Off 500Hz Tone 1kHz Tone Allows you to assign an audio test signal to the AES audio output 4 2 8 Embedded Gain Selecting Embedded Gain in the Audio Block ...

Page 24: ...Mute Disable Disable Enable Selecting Enable mutes all the audio signals Ch 1 8 Ch 1 16 1 0 0dB 20 0dB to 20 0dB 0 1 Sets the gain for each channel Pressing Unity resets values Master 0 0dB 20 0dB to 20 0dB 0 1 Sets the gain offset for all channels Pressing Unity resets values USF 101MDX4 12G For Ch1 2 3 4 or Ch5 6 7 8 that are set to Input under AES Input Settings in Sec 4 2 2 AES Input AES Gain ...

Page 25: ...hronous output with SRC CH 1 2 15 16 Uses the selected input channel pair clock To asynchronously output non PCM audio select a channel pair 4 2 11 Audio System Selecting Audio System in the Audio Block diagram opens the following menu screen Item Default Setting Description Reference Level 20 dBFS 18 dBFS 20 dBFS Selects the reference level for digital audio signals Grade Professional Professiona...

Page 26: ... Status in the Audio Block diagram opens the following screen showing SDI and AES audio input status 4 2 13 Audio Output Status Selecting Audio Output Status in the Audio Block diagram opens the following screen showing SDI and AES audio output status ...

Page 27: ...lected event memory at startup Load Event button Pressing the button loads the event selected below under Event No Save Event button Pressing the button saves settings to the event selected below under Event No IMPORTANT Turn off the power supply 5 seconds after event saving If the power supply is turned off less than 5 seconds after saving the event may not be properly saved 4 4 Status Tab Select...

Page 28: ...e 4 1 5 Output Select Audio Test Signal Disable 4 2 7 Monosum Downmix Test Signal Master Mute Disable 4 2 7 Monosum Downmix Test Signal Master Mute Embedded Disable 4 2 8 Embedded Gain Master Mute AES Disable 4 2 9 AES Gain 6 Last Settings Auto Save Feature Last settings are saved automatically When you changed settings turn off the power supply 10 seconds after change If the power supply is turne...

Page 29: ...Windows 10 Internet Explorer 11 Google Chrome 71 0 3578 80 以降 Firefox 63 0 3 See the USF frame Operation Manual for details on how to connect to USF 101MDX4 8 12G cards from a web browser through USF frames 7 1 Module Information Pressing Status Module Information displays the module and option information as shown below 7 2 Video Status Pressing Status Video Status displays the input and output v...

Page 30: ...ut See Trap List in Sec 9 About SNMP for details IMPORTANT If FPGA2 temperature rises over 100 C and FPGA２ power shutdown feature works Traps listed as below are not sent out regardless of the Temperature Alarm setting FPGA2 Thermal Shutdown Trap is sent out Temperature Alarm When FPGA2 temperature rises more than 90 C a trap FPGA2TEMP Warning is sent out at about 60 second intervals SDI Input If ...

Page 31: ...nt Data displays the screen as shown below and allows you to save Event Export and load Event Import menu settings using the Event function Event Export Downloads an event menu setting list stored in the USF 101MDX4 8 12G and saves it in the PC as a csv file 1 Select an event number 2 Press Export to download the specified USF 101MDX4 8 12G event data Event Import Selects a csv file with the same ...

Page 32: ...parated by three delimiters comma characters See Sec 8 2 1 Setting Commands Port Number 60000 for both TCP IP and UDP IP default Port number should be specified on the USF module Web GUI menu Connection Timeout Keep Alive Idle No response comes back within 10 seconds while connection is established the connection port is released To send commands reconnect to the USF 101MDX4 8 12G module Command S...

Page 33: ... Target Ch Value CR LF 8 3 1 2 Audio MAP ID code Target Ch Value CR LF 8 3 2 3 Audio Gain ID code Master Gain Value CR LF 8 3 3 4 Audio Gain ID code Target Ch Value CR LF 8 3 4 5 Audio Delay ID code Master Value CR LF 8 3 5 6 Audio Delay ID code Target Ch Value CR LF 8 3 6 See Sec 8 3 Command Details Audio 8 2 3 Setting Command List Other sent from Command Systems No Command strings Refer to 7 Pow...

Page 34: ... 4 2 9 AES Gain for more details Value Description 0 Normal 1 Invert ID code Description EMB1 EMB1 control EMB2 Reserved AES AES control Item code Description Ch1 Ch16 Ch1 Ch16 when EMB1 Ch1 Ch8 when AES Value Description 0 16 Source1 Source16 64 66 64 500Hz Tone 65 1kHz Tone 66 Silence 80 81 80 Downmix_1_L 81 Downmix_1_R 96 98 100 102 104 106 108 Mono Sum Ch1 Ch8 ID code Description EMB1 EMB1 con...

Page 35: ... Value CR LF See Sec 4 2 4 Input Delay for more details Value Description 200 200 20 0 20 0dB 0 1 steps Selected channel gain ID code Description EMB1 EMB1 control EMB2 Reserved AES AES control Item code Description Ch1 Ch16 Ch1 Ch16 if ID code is EMB1 Ch1 Ch8 if ID code is AES Value Description 5 1000 5 1000ms 1 steps Delay offset for all 16 channels ID code Description ADLY G1 Internal Ch1 16 AD...

Page 36: ... 4 3 Event Save Commands Command strings Event COM Save Value CR LF Value Description 1 100 Saves all settings to the selected event number 8 4 4 Payload ID Setting Commands Command strings Payload ID COM Item code Value CR LF ID code Description DR Dynamic Range setting WCG Wide Color Gamut setting 8 4 5 Status Request Commands Audio 1 Command strings Status2 ID code Get 0 CR LF ID code Descripti...

Page 37: ...s Request Commands Audio 2 Command strings Status3 ID code Get 0 CR LF ID code Description ADLY G1 Request to ADLY G1 ADLY G2 Reserved 8 4 7 Status Request Commands Payload ID Command strings Status4 COM Get 0 CR LF ...

Page 38: ...G module USF 101MDX4 8 12G modules issue a status message whenever either of the following conditions is met 1 USF 101MDX4 8 12G modules receive a status request command from a command system 2 USF 101MDX4 8 12G module status changes by other means than remote commands Status report USF 101MDX4 8 12G modules send status messages via UDP IP For Condition 2 status report USF 101MDX4 8 12G modules de...

Page 39: ...to Status2 16 0 16 64 66 80 81 96 98 100 102 104 106 108 Ch1 16 Audio Mapping settings 0 16 Source1 16 64 500Hz Tone 65 1kHz Tone 66 Silence 80 Downmix_1_L 81 Downmix_1_R 96 98 100 102 104 106 108 Monosum Ch1 8 See Sec 8 3 2 Audio MAPPING Setting Commands Status 2 9 to 2 16 are fixed to 1 for AES Parameter String Description Status3 200 200 Audio Master Gain setting See Sec 8 3 3 Audio Master Gain...

Page 40: ...ion Status2 1 to Status2 16 5 1000 Ch1 16 Audio Delay settings sent from Ch1 to Ch16 order See Sec 8 3 6 Audio Delay Setting Commands 8 6 3 Status Message Payload ID Status message Status4 COM RPT Status1 Status2 CR LF Parameter String Description Status1 0 3 DR setting See Sec 8 4 4 Payload ID Setting Commands Parameter String Description Status2 0 3 WCG setting See Sec 8 4 4 Payload ID Setting C...

Page 41: ...odule 8 7 3 Reporting USF Module Status Change 1 The USF module issues a status message to command systems up to two UDP IP See Sec 8 6 Status Messages from USF Module 2 The command systems send the normal response ACK to the USF module See Sec 8 5 Command Responses If no ACK returns the USF module re sends the status message up to three times See Sec 8 6 Status Messages from USF Module for more d...

Page 42: ...ING FPGA2 Version usf101Mdx412GFpga2Version FPGA2 version 14 OCTET STRING FPGA2 TEMP usf101Mdx412GFpga2Temperature 0 127 101 INTEGER Video SDI Input Status usf101Mdx412GInputVideoStatusSdi Video signal status 401 OCTET STRING SDI Output Status usf101Mdx412GOutputVideoStatusSdi Same as above 501 OCTET STRING Genlock Input Status usf101Mdx412GGenlockInputStatus Same as above 601 OCTET STRING LTC Inp...

Page 43: ...VideoStatusSdi Video signal status 401 OCTET STRING SDI Output Status usf101Mdx812GOutputVideoStatusSdi Same as above 501 OCTET STRING Genlock Input Status usf101Mdx812GGenlockInputStatus Sane as above 601 OCTET STRING LTC Input Status usf101Mdx812GLTCInputStatus 0 notDetected 1 Detected 2 Output 602 INTEGER Audio Embedded Audio CH No usf101Mdx812GEmbeddedAudioStatus Channel 1 16 CH1 CH16 701 1 1 ...

Page 44: ...lotNumber INTEGER usf101Mdx412GLTCInputStatu s TRAP List USF 101MDX8 12G Object Group Item Name Trap output conditions Object name in MIB file OID Type Reference Object OID 1 3 6 1 4 1 20175 1 348 0 TRAP TRAP FPGA2 TEMP Warning FPGA2 temperature warning Temperature over 90 C 60 seconds interval usf101Mdx812GFpga 2TemperatureWarning 21 INTEGER usf101Mdx812GSlotNumber INTEGER usf101Mdx412GFpga2Tempe...

Page 45: ...tical 1 2 Frame to 1 2 Frame Delay Max 1 Frame 1 H Min 1 H Line mode Horizontal 1 2 H to 1 2 H Vertical 1 2 Frame to 1 2 Frame Delay Max 1 H 1 2 H Min 1 2 H AVDL mode Horizontal 1 2 H to 1 2 H Vertical 1 2 Frame to 1 2 Frame Delay HD Max 5 H 1 2 H Min 1 2 H Line Min mode Horizontal 1 2 H to 1 2 H Vertical 1 2 Frame 1 2 Frame Delay Max 1H 730 CLK Min 730 CLK Audio input SDI embedded 16 channels Gro...

Page 46: ...tical 1 2 Frame to 1 2 Frame Delay Max 1 Frame 1 H Min 1 H Line mode Horizontal 1 2 H to 1 2 H Vertical 1 2 Frame to 1 2 Frame Delay Max 1 H 1 2 H Min 1 2 H AVDL mode Horizontal 1 2 H to 1 2 H Vertical 1 2 Frame to 1 2 Frame Delay HD Max 5 H 1 2 H Min 1 2 H Line Min mode Horizontal 1 2 H to 1 2 H Vertical 1 2 Frame 1 2 Frame Delay Max 1H 730 CLK Min 730 CLK Audio input SDI embedded 16 channels Gro...

Page 47: ...47 10 2 External Dimensions USF 101MDX4 12G All dimensions in mm 106 3 2 24 5 13 5 357 114 DIGITAL AUDIO IN OUT USF 101MDX4 12G SDI OUT LTC I O SDI IN 7 8 5 6 3 4 1 2 USF 101MDX4 12G 40 7 334 ...

Page 48: ... External Dimensions USF 101MDX8 12G All dimensions in mm 3 2 24 5 13 5 114 357 106 USF 101MD X8 12 G 334 40 7 USF 101M DX8 12G SDIOUT 9 10 11 12 13 14 15 16 SDIIN LTC I O 1 2 3 4 5 6 7 8 DIGITAL AU DIO IN OUT ...

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