Theory of Operation
Detailed Circuit Description
2
2-21
Totalizer Debouncing and Mode Selection Logic internal to the FPGA lets the
Microprocessor enable a debouncer in the Totalizer input signal path. You can find the
detailed description of the Totalizer Debouncer and Mode Selection later in this chapter
under the heading "Totalizer Input."
Totalizer Counter There is a 16 bit counter internal to the FPGA to count the totalizer
inputs. When the 16 bit counter overflows, the microprocessor is interrupted and a
software counter is incremented.
External Trigger Logic Logic internal to the FPGA allows the Microprocessor to set
up the External Trigger Logic to interrupt on rising or falling edges of the XTI input to
the FPGA. The FPGA also allows the Microprocessor to pulse an external trigger output
from the FPGA. The detailed description of the External Trigger operation may be found
later in this chapter in the "External Trigger Circuits" section.
Serial Communication (Guard Crossing)
2-39.
The transmission of information from the Microprocessor (A1U1) to the A/D
Microprocessor (A3U5) is accomplished via the circuit made up of A1U5, A1R8,
A1R16, and A1CR22. The transmit output from the Microprocessor (A1U1-80) switches
current through optocoupler LED (A1U5-3). Resistor A1R8 limits the current through
the LED.
The photodiode in A1U5 responds to the light emitted by the LED when A1U1-80 is
driven low. The open collector output (A1U5-6) is pulled high by A1R16 and A1CR22.
This output is connected to a serial port input on the A/D Microprocessor (A3U5-53).
The transmission of data from the A/D Microprocessor (A3U5) to the Microprocessor
(A1U1) is accomplished via the circuit made up of A1U7, A1R7, and A1R3. The
transmit output from the A/D Microprocessor (A3U5-54) drives the optocoupler LED
(A1U7-3). The current through the LED is limited by resistor A1R7. The photodiode in
A1U7 responds to the light emitted by the LED when A1U7-3 is driven low.
The photodiode in A1U7 responds to the light emitted by the LED when A3U5-54 is
driven low. The open collector output (A1U7-6) is pulled high by A1R3. This output is
connected to a serial port input on the Microprocessor (A1U1-52).
RS-232 Interface
2-40.
The RS-232 interface is composed of connector A1J4, RS-232 Driver/Receiver A1U13,
and the serial communication hardware in Microprocessor A1U1.
The serial communication transmit signal (A1U1-54) goes to the RS-232 driver
(A1U13-14), where it is inverted and level shifted so that the RS-232 transmit signal
transitions between approxi5.0 and -5.0V dc. When the instrument is not
transmitting, the driver output (TP13;A1U13-3) is approximately -5.0V dc. The RS-232
receive signal from A1J4 goes to the RS-232 receiver A1U13-4, which inverts and level
shifts the signal so that the input to the serial communication hardware transitions
between 0 and +5.0V dc. When nothing is being transmitted to the instrument, the
receiver output (TP12;A1U13-13) is +5.0V dc.
Summary of Contents for NetDAQ 2640A
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Page 243: ...Schematic Diagrams 7 7 11 Figure 7 2 A2 Display PCA Assembly cont 2620A 1002...
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