271
Users Manual
sha0023f.emf
On each clock cycle the phase increment, which has been loaded into the phase increment
register by the CPU, is added to the current result in the phase accumulator; the 10 most
significant bits of the phase accumulator drive the RAM address lines. The output
waveform frequency is now determined by the size of the phase increment at each clock.
If each increment is the same size then the output frequency is constant; if it changes, the
output frequency changes but with phase continuity.
The generator uses a 38-bit accumulator and a clock frequency which is 2
38
x 10
-4
(approximately 27.487 MHz); this yields a frequency resolution (corresponding to the
smallest phase increment) of f
CLK
/
2
38
= 0.1 mHz.
Only the 10 most significant bits of the phase accumulator are used to address the RAM.
At a waveform frequency of f
CLK
/1024 (approximately 26.84 kHz), the ‘natural’
frequency, the RAM address increments on every clock. At all frequencies below this
(i.e. at smaller phase increments) one or more addresses are output for more than one
clock period because the phase increment is not big enough to step the address at every
clock. Similarly at waveform frequencies above the natural frequency the larger phase
increment causes some addresses to be skipped, giving the effect of the stored waveform
being ‘sampled’; different points will be sampled on successive cycles of the waveform.
The minimum number of points required to reproduce a wave shape accurately will
determine the maximum useful output frequency:
f
MAX
= f
CLK
/(number of points)
For sine waves the filter permits the waveform to be reproduced accurately up to the
Nyquist limit (f
CLK
/2), although in this generator a practical limit of 10 MHz is set.
B-2
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