
2-5
9000A-006 Service
placed on the bus until commanded to do so by the Troubleshooter. Since only four bits of
signature data are placed on the pod bus at a time, four read operations are required by the
Troubleshooter to shift all four characters of signature data through the CRC section and
onto the bus.
The events section generates a 24-bit (six hex-digit) count of events (transitions) that take
place in the test data input. Events counting is selected to take place only during the gate-
time, or continuously (free-running mode). Control lines from the control section select
the signal source to be counted and determine whether to count on a continuous basis or
only during the time of the gated signals. The output of the events section is applied in
four-bit parallel form to a parallel load input of the CRC section. As the Troubleshooter
reads the signature from the CRC section, the event section is pulsed to shift its contents
into the CRC section behind the CRC data being shifted onto the pod bus. To read the
entire contents of the event section over the pod bus, the Troubleshooter performs six
more read operations subsequent to the four used to transfer the signature data.
The waveform register receives the serial data fed from the UUT and loads it serially into
a 32-bit shift register. The operation of the shift register is such that it always contains a
binary representation of the last 640 nanoseconds of test data fed from the probe. This test
data can be displayed on the Troubleshooter as a waveform.
The output of the shift register is 4 bits (one nibble) wide, and is available to the
Troubleshooter via the events section, the CRC section, and the pod bus. To read the
contents of the shift register for display, the Troubleshooter first reads the CRC and event
sections. It then commands the control section to issue the necessary shift commands to
place each nibble of waveform data on the pod bus. Once the Troubleshooter has read the
contents of the waveform section, it can display a representative waveform of the last 640
nanoseconds of probe data.
DETAILED BLOCK,DIAGRAM DESCRIPTION
2-3.
Clock Module
2-4.
The primary function of the clock module is to buffer the UUT control signals. Clock
module circuitry consists of four analog comparators, one for each of the start, stop, clock,
and enable signals. The input of each comparator is compared to a 1.4V reference.
Hysteresis is applied to each channel to help reject noise.
Control Section
2-5.
The main functions of the control section are as follows:
•
Recognize the turn-on op code from the Troubleshooter.
•
Prevent the Interface Pod from receiving the MAINSTAT signal after the turn-on op
code and before the turn-off op code have been received.
•
Decode the op codes sent by the Troubleshooter over the pod bus and generate the
corresponding control signals to the gate, CRC, events, and waveform sections.
Figure 2-2 shows the main elements of the control section, with the Troubleshooter/
Interface Pod connections on the left side and the connections to the remainder of the
module on the right side. During operation, the Troubleshooter addresses both the
Interface Pod and the Signature Module as required to fulfill testing requirements.
Summary of Contents for 9000A-006
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