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FIBOCOM SU806 Series Hardware Guide
Page 50 of 86
Module
MIPI_CSI1_CLK_P
SCAM_RST
MIPI_CSI1_CLK_N
MIPI_CSI1_LN0_P
MIPI_CSI1_LN0_N
MIPI_CSI1_LN1_P
MIPI_CSI1_LN1_N
C
AM
C
onn
e
ct
or
CAM_I2C_SDA1
CAM_I2C_SCL1
SCAM_PWDN
SCAM_MCLK
CLK_P
MCLK
CLK_N
DAT0_P
DAT0_N
DAT1_P
C
A
M
C
o
n
n
e
ct
o
r
PWD
RST
SCL
SDA
DAT1_N
V D D 1V 85
NC
NC
V D D C A M A
AVDD
DOVDD
DVDD
VDD1V8
V D D C A M C O R E
10
uF
1
uF
10
uF
E M I
E M I
E M I
1
0
0
nF
1
0
0
nF
Figure 3-18 Front camera reference design
3.17.3
Depth Camera
Pin definition of depth camera is shown as follow:
Module
MIPI_CSI1_LN3_P
DCAM_RST
MIPI_CSI1_LN3_N
MIPI_CSI1_LN2_P
MIPI_CSI1_LN2_N
CAM_I2C_SDA1
CAM_I2C_SCL1
DCAM_PWDN
DCAM_MCLK
CLK_P
MCLK
CLK_N
DAT0_P
DAT0_N
C
A
M
C
o
n
n
e
ct
o
r
PWD
RST
SCL
SDA
V D D 1V 85
NC
NC
V D D C A M A
AVDD
DOVDD
V D D 1V 8
E M I
E M I
10
uF
1
0
0
nF
1
uF
Figure 3-19 Depth camera reference design
3.17.4
Design Notice
MIPI_CSI is a high-speed signal which has relatively high requirement for routing and must be prioritized
when PCB layout.
