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FIBOCOM L860-GL Series Hardware Guide
Page 27 of 60
Pin
Pin Name
I/O
Reset Value
Function
Type
50
PERST#
I
PU
Asserted to reset module PCIe
interface default. If module went into
core dump, it will reset whole
module, not only PCIe interface.
Active low, internal pull up
(10KΩ)
3.3V
Note
：
RESET# and PERST# need to be controlled by independent GPIO, and not shared with other
devices on the host. RESET# and PERST# are sensitive signals, so they should keep away from
RF interference and be protected by GND. It should be neither near PCB edge nor route on
surface layer to avoid module abnormal reset caused by ESD.
Module Start-Up
3.3.1.1
Start-up Circuit
The FCPO# ( FULL_CARD_POWER_OFF #) pin needs an external 3.3V or 1.8V pull up for booting up.
AP (Application Processor) controls the module start-up. The recommended design is using a default PD
port to control FCPO#. It also should reserve a 100K pull down resistor on AP side. The circuit design is
shown in Figure3-4:
Figure 3-4 Circuit for module start-up controlled by AP
3.3.1.2
Start-up Timing Sequence
When power supply is ready, the PMU of module will power on and start initialization process by pulling
high FCPO# signal. After about 15s, module will complete initialization process. The start-up timing is
shown in Figure 3-5:
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