DELUXE™ 90 DSP
(This is the model name for warranty claims)
5
CIRCUIT DESCRIPTION
This section provides an overview of any new or
unusual circuitry incorporated into this amplifier
model. The purpose is to aid the service technician
by providing insight into the design areas most
likely to present a challenge in troubleshooting.
This overview is focused for the efficient use and
security of Fender® proprietary information.
PRE-AMPLIFIER
The guitar input signal is fed into the high pass filter
at U1–A before splitting into two signal paths. The
normal channel signal path through U1–B is active
until FETs Q5 and Q6 are turned on activating the
drive channel signal path (U2–A to U3–B). FETs
Q1, Q3, and Q4 activate the “More Drive” channel
signal path for increased gain and sustain. Differ-
ential amp U4–B and inverting follower U5–B
supplies the input to the DSP card with the appro-
priate gain, a differential input signal, and +1.65V
DC bias. The preamp is in series with the digital
effects card, therefore, disconnecting the card
breaks the overall signal path. The low pass filter at
U5–A recovers the signal from the uDSP card and
sends it to the external effects loop and power am-
plifier.
POWER AMPLIFIER
The input signal is conditioned at filter U6-B. Dif-
ferential amplifier Q11 and Q12 is fed by current
source Q10, which is controlled by a thermal pro-
tection circuit comprised of Q8, Q9, and RT2. This
circuit is also controlled by the MUTE signal (at the
base of Q9) to mute the power amplifier at turn-on,
turn-off, and upon removal of all input jacks. The
current turnaround at Q13 is used to feed the output
of the differential amplifier stage to a voltage ampli-
fier comprised by Q14 and Q15. Q16 and Q17
provide voltage multiplication for output bias. Q20
and Q21 are Darlington drivers for output devices
Q22 and Q23. Q18 and Q19 provide over-current
protection.
POWER SUPPLY
Standard bridge rectifier for the ±40V supply, with
zener regulation (D50–51) for the ±16V supplies.
U10 (7805 regulator) su5V for the uDSP
card and digital user–interface.
DIGITAL USER INTERFACE
The uDSP effects card generates clock signal HD1
which controls the 4053 CMOS switch to read pots
R61, and R62. The DC level (0–5V) of the pots
controls the effects level, and effects time/rate. The
output of the 4–bit encoder, S3, determines the ac-
tive effect algorithm (HD4–HD7).
DIGITAL NOISE
The DSP section of this amplifier produces some
high frequency noise (>50 kHz). This noise is a
normal byproduct of DSP processing. It is not
audible, and does not affect the operation of the
amplifier, but may be apparent when observing the
output of the amplifier on an oscilloscope.
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