INP-TN512878-E
7
2.2.3 Bumpless changeover circuit using primary integration circuit
Figure 2-3
(Integrate R·SV-PV value (Y4) of secondary input processing wafer (41) by way of primary PID
wafer.)
When the arithmetic operation between primary PID and secondary PID becomes complicated, many
wafers are required for inverse arithmetic operation for tracking. In such a case, compensation can
be made by using R · SV-PV appearing in output (Y
4
) of the secondary input processing wafer.
When constant value control is good in the A-mode and steady-state is produced, secondary PV and
secondary SV are almost matched. When the deviation between this PV and 41 wafer output Y4 (R
· SV-PV) is made small, the R · SV value and the secondary SV value are almost matched.
For this purpose, the R · SV value is controlled by using the output of R · SV-PV in integration (I)
term of primary PID arithmetic operation in the A-mode. Provided, however, that when the primary
side is of positive action, it is necessary to input an input value with inversed sign to primary
integration (I) term.
Furthermore, attention is needed if the primary PID and secondary PID are of extreme non-linear
type or of large gain.
Summary of Contents for CC-M
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