Fastwel DIC324, User Manual

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User Manual DIC324
2.3 Module's functional nodes and interfaces
2.3.1 Base FPGA (BASE)
Base FPGA is a control FPGA of the module. It has implemented: Local Bus generation
for communication with the module's node of digital I/O, SPI controller for implementation of in-
circuit programming and configuration of this node, as well as module's base address selector
and interrupt operating line on ISA bus. As FPGA, Xilinx FPGA of the Spartan 6 (XC6SLX4-
2CSG225I) series is used.
2.3.2 System ISA bus
The module is equipped with 8-bit ISA bus
The interface is routed to the XS4 connector. Description of ISA connector contacts (rows A
and B) of the module for the connection to the external system ISA bus is shown in the tables
below.
Table 2-1: Identification of ISA bus contacts, row A
Contact Signal State Contact Signal State
A1 /IOCHK
–
A17 SA14 Input
A2 SD7 Input / Output A18 SA13 Input
A3 SD6 Input / Output A19 SA12 Input
A4 SD5 Input / Output A20 SA11 Input
A5 SD4 Input / Output A21 SA10 Input
A6 SD3 Input / Output A22 SA9 Input
A7 SD2 Input / Output A23 SA8 Input
A8 SD1 Input / Output A24 SA7 Input
A9 SD0 Input / Output A25 SA6 Input
A10 IOCHRDY Output A26 SA5 Input
A11 AEN Input A27 SA4 Input
A12 SA19 Input A28 SA3 Input
A13 SA18 Input A29 SA2 Input
A14 SA17 Input A30 SA1 Input
A15 SA16 Input A31 SA0 Input
A16 SA15 Input A32 GND Power supply
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