© 2012 Fairchild Semiconductor Corporation
11
FEBFL7730_L20H008A • Rev. 0.0.2
6.
Performance of Evaluation Board
6.1.
Startup
Startup time is 0.7s. There is no overshoot at output current and voltage in startup
sequence (
refer I
OUT
and V
DD
waveform. V
DD
indicates a reflected output voltage
).
Figure 13.
Startup – V
IN
[220V
AC
], C1 [V
IN
], C2 [V
CS
] C3 [V
DD
], C4,[I
OUT
], (No Dimmer Connected)
6.2.
Operation Waveforms
In steady state, line compensation regulates output current regardless of input voltage
variations. Output current ripple is ±65mA with a rated output current of 380mA.
Figure 14.
Operation Waveforms – V
O
[22V], I
O
[380mA], C1 [V
CS
], C3, [V
IN
], C4 [I
OUT
]
V
IN
= 180V
AC
V
IN
= 220V
AC
V
IN
= 230V
AC
V
IN
= 265V
AC
