Model 5601MSC
Model 5601MSC Master SPG/Master Clock System
TECHNICAL DESCRIPTION
Revision 2.2
Page - 167
5.1.5. DARS & AES Test Generator Outputs (SDTG, HDTG, or 3GTG options)
Standard:
Unbalanced:
SMPTE 276M Single ended AES (24 bits)
Balanced:
AES3-1992 (24 bits)
Number of Outputs:
DARS:
1 unbalanced, 1 balanced
AES Test Gen:
2 unbalanced, 2 balanced
Connector:
Unbalanced:
BNC per IEC 61169-8 Annex A
Balanced:
Removable Terminal Strip
Sampling Rate:
48kHz
Impedance:
Unbalanced:
75
Ω unbalanced
Balanced:
110
Ω balanced
Signalling:
Unbalanced Amplitude:
1V
p-p
± 10% (into 75Ω)
Unbalanced Rise/Fall:
30ns to 44ns (10% to 90%)
Unbalanced DC Offset:
0V ± 50mV
Balanced Amplitude:
4V
p-p
± 10% (into 110
Ω)
Balanced Rise/Fall:
5ns to 30ns
Unbalanced Return Loss:
> 25dB 100kHz to 6MHz
AES Tones:
Menu selectable
5.1.6. Reference Loop and Genlock
Absolute Maximum Rating:
-5V to +5V
Supported References:
Black Burst (NTSC-M or PAL-B)
(auto-detected)
Bi-Level sync (Slo-PAL 625i/48 or 625i/47.95)
HD Tri-Level sync (1080i/60/50/59.94)
HD Tri-Level sync (1080p/24sF/23.98sF/30/29.97/25/24/23.98)
HD Tri-Level sync (720p/24/50/60/59.94)
5MHz or 10MHz Continuous Wave (frequency auto-detected)
Number of Inputs:
2 Loop thru
Connector:
BNC per IEC 61169-8 Annex A
Black Burst References:
Input Level Range:
from –3.5dB (double terminated) to +6dB (unterminated)
Input SCH Range:
± 35º
Lock Type:
Sync edge lock / sub-carrier lock with NTSC-M and PAL-B
5MHz/10MHz Reference:
Input Level:
300mV
(p-p)
to 4.0V
(p-p)
Locking Range:
Narrow ±0.1ppm, Wide ±15ppm
Operating Common-Mode
Hum Level:
3V
(p-p)
Operating In-Signal Hum
Level:
0.5V
(p-p)
Input Impedance:
4.4k
Ω, isolated, differential (external termination required)
Return Loss:
> 40dB to 10MHz (with external 75
Ω termination)