ETAS
Hardware Description
FETK-T1.1
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User
Guide
19
4
Hardware Description
This chapter contains information about the following topics:
• Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
• ECU Interface. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
• FETK Ethernet Interface. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
• Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
• ECU Voltage Supervisor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
• Status LEDs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
• Data Access . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
• DAP Interface. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
• Trace Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
• Trigger Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
• Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
• Pull CalWakeUp until Startup Handshake. . . . . . . . . . . . . . . . . . . . . . . . . 29
4.1
Architecture
1 shows the block diagram of the FETK-T1.1.
Fig.
4
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1
FETK-T1.1 Architecture
While the microcontroller accesses the program data (not the program code)
out of the data emulation memory provided by the microcontroller, the content
of the data emulation memory can simultaneously be modified by the calibra
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tion and development system through the FETK-T1.1 interface. This process
enables adjustments of parameters, characteristic lines and maps through the
calibration and development system.
Using a trace interface, the FETK-T1.1 can aquire measurement data and send
the measured data to the PC.
FPGA
Trigger
Unit
Trace
Unit
Int erf ace
t o ECU
Aut omatic
Power-On
FETK
Int erf ace
1
Gbit/s
Pow er
Supp ly
M onito ring
Po wer
Su pply
St andby
Po wer
Su pply
ECU
Reset &
Po wer
Cont ro l
ECU Reset
Ethernet
Ph y
Eth ernet
Traf f ic
Det ect ion
Sen se ECU Voltage
ECU
Deb ug
In terf ace
Dat a
Flash
UBatt
ECU ED-RAM, In terface Sup ply
Deb ug
Pow er
CAL
Wakeup
Auro ra
Trace
Trace
M irror
M emory
Trace
FiFo
M emory
ECU
Access
Unit
Cont rol
Unit