ETAS BR-XETK-S4.0, User Manual, Page: 46 / 82

ETAS Technical Data
BR_XETK-S4.0 - User Guide 46
7.9 SWD Timing Characteristics
The BR_XETK-S4.0 supports SWD modes:
• 2-pin SWD mode: one data pin (direction via protocol), one clock pin
7.9.1 2-Pin SWD Mode
NOTE
SWD timing parameters in this chapter refer to the SWD interface (CON2) of
the BR_XETK-S4.0. The SWD wiring to the ECU (ETAM8) must be taken
account additionally.
All timings are measured at a reference level of 1.5 V.
Parameter Symbol Value [ns] Comment
SWCLK Clock Period
(typ.)
(ETK --> Target)
t
CLK
14.29 70 MHz SWD Clock Fre -
quency
SWDIO Set-Up Time
(ETK --> Target)
t
SU
4
SWDIO Hold Time
(ETK --> Target)
t
H
1.5
SWDIO Clock-to-Out
Time (Target --> ETK)
t
CO
12.4
SWDIO Valid Time (Tar -
get --> ETK)
t
valid
4.3