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Standard Event Status Register (ESR)
Bit7
Bit6
Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
PON 0 CME EXE DDE QYE
0
OPC
Bit 0:
OPC - Operation complete.
This bit is generated in response to the *OPC command and indicates
that the interface is ready to accept another message.
Bit 1:
Not used and always set to 0.
Bit 2:
QYE - Query Error
Attempt has been made to read
data
from the Output Queue when no
output is present or pending. Or, both input and output buffer are full.
Bit 3:
DDE - Device-Dependent Error.
Incorrect input during calibration, or RS-232 input buffer overflow.
Bit 4:
EXE - Execution Error.
Execution Error will occur beside no command error but it is
happened as following example, to query compare result, but
instrument has not been set in compare mode.
Bit 5:
CME - Command Error.
Command or parameter is wrong or unknown.
Bit 6:
Not used and always set to 0.
Bit 7:
PON - Power On.
Power has been cycled off and on since the last time the ESR was
read.
Notes:
1. The Standard Event Status Register
can be read by the
“
*ESR?
”
query.
2. The register is cleared at power up or after
“
*ESR?
”
or
“
*CLS
”
command.
