Technical Description
18
Seiko Epson Corporation
S5U13705B00C Rev 2.0 PCI Evaluation Board
Rev. 3.1
6.5 Adjustable LCD Panel Negative Power Supply (VLCD)
For those LCD panels requiring a negative power supply to provide between -23V and -
14V (Iout = 25mA) a power supply has been provided as an integral part of this design. The
VLCD power supply can be adjusted by R21 to give an output voltage from -23V to -14V
and is enabled and disabled by the active high LCDPWR control signal of S1D13705 and
inverted externally.
Determine the panel’s specific power requirements and set the potentiometer accordingly
before connecting the panel.
6.6 Passive/Active LCD Panel Support
The S1D13705 directly supports:
• 4/8-bit, single and dual, monochrome passive panels.
• 4/8-bit, single and dual, color passive panels.
• 9/12-bit, TFT active matrix panels.
All the necessary signals are provided on the 40-pin LCD connector J5. For connection
information, refer to
Table 5-1: “LCD Signal Connector (J5)”
The buffered LCD connector (J5) provides the same LCD panel signals as those directly
from S1D13705, but with voltage-adapting buffers selectable to 3.3V or 5.0V. Pin 32 on
this connector provides a voltage level of 3.3V or 5.0V to the LCD panel logic (see “JP6 -
LCDPWR Polarity” on page 12 for information on setting the panel voltage).
6.7 Power Save Modes
The S1D13705 supports one hardware and one software power save mode. The hardware
power save mode needs to be enabled by setting REG[02h] bit1 to 1 and then can be
activated by DIP switch SW1-6. See
