Epson S1V30080F00A300 User Manual Download

Page: 13 / 39

2. Before Starting

EPSON

S1V30080 Series Evaluation Board User’s Guide

(Rev. 1.00)

2.2.2 Cinderella block diagram

Figure 2.6 illustrates the Cinderella block diagram.

Figure 2.6 Cinderella block diagram

VREG

USB

+5.0V

+3.3V

DIP SW

Push SW

RESET

S1V30080

GND

SCKS

SIS

SOS

SCLK

SDA

SET_PLAY0

VSS

MSG_RECEIVE

VSS

SET_PLAY1

SET_PLAY2

SET_PLAY3

SOUND_PLAYING

SYSTEM_EN

VDD

SOS

VSS

VDD

MSG_RECEIVE

SOUND_PLAYING

SYSTEM_EN

CPLD

GND

LED

SERIAL

FLASH Memory

GND

セグメント

LED

CON3

CON2

CON1

JP1

7-segment

LED

Summary of Contents for S1V30080F00A300

Page 1: ...Rev 1 00 S1V30080 Series Evaluation Board User s Guide ...

Page 2: ...Moreover no license to any intellectual property rights is granted by implication or otherwise and there is no representation or warranty that anything made in accordance with this material will be free from any patent or copyright infringement of a third party This material or portions thereof may contain technology or the subject relating to strategic products under the control of the Foreign Ex...

Page 3: ...ram 16 2 4 Cinderella and CASTLE connection 17 3 Usage Instructions 18 3 1 Writing data to Cinderella board 18 3 1 1 Data writing flowchart 19 3 1 2 Cinderella board data writing micro SD card 21 3 2 Cinderella board standalone demo 22 3 2 1 Standalone mode 1 control 23 3 2 2 Standalone mode 2 control 24 3 3 Connecting to an external host CPU 25 4 Usage Precautions 27 4 1 DIP switch definitions 27...

Page 4: ... memory on the Cinderella board Data is written with the Cinderella connected to the CASTLE The data written can be accessed as a standalone Cinderella demo or by connecting an external host CPU Cinderella standalone demo function Evaluation is possible with the standalone Cinderella using the built in ROM of the S1V30080 or data in the Cinderella flash memory Push switches on the Cinderella are u...

Page 5: ...mory Non Japanese voice data Japanese voice data Interface mode when initialized by external flash memory default Standalone 2 Standalone 2 Note For details of the default data contained in the ROM and flash memory refer to the S5U1V30080D00A1 Data List or S5U1V30080D00A3 Data List provided separately 1 3 User guide overview This user guide is arranged as follows Section 2 describes the preparatio...

Page 6: ...terface cable for connecting to CON3 1 3 Speaker cable 1 4 CASTLE host CPU board for voice LSI control 1 5 micro SD card 1 6 micro SD card USB adapter 1 7 Evaluation board USB power supply cable 1 8 Cinderella CASTLE connector cable Note 1 1 9 Item list and sheet describing voice LSI web page 1 Figure 2 1 Figure 2 2 Figure 2 3 Note Items 2 3 5 6 7 and 8 may differ from those shown in the photograp...

Page 7: ...ON1 Slave This is used to write ROM data to the flash memory on the Cinderella by connecting to CON1 on the CASTLE The CON1 pin layout is shown in Table 2 1 Table 2 1 Cinderella CON1 connector No I O Cinderella CON1 CASTLE CON1 signal level 1 VDD1 5 V 2 VDD2 3 3 V 3 VDD3 1 8 V 4 CLOCK_OUT 5 NRESET 6 I SCKS_FLASH SCKM 3 3 V LVCMOS 7 I SIS_FLASH SOM 3 3 V LVCMOS 8 O SOS_FLASH SIM 3 3 V LVCMOS 9 I NS...

Page 8: ...layout is shown in Table 2 2 Table 2 2 Cinderella CON2 connector No I O Cinderella CON2 Castle CON2 signal level 1 P None VDD1 5 V 2 P VDD VDD2 3 3 V 3 P VDD3 1 8 V 4 I SCLK GPIO0 3 0 5 5 V CMOS 5 IO SDA GPIO1 3 0 5 5 V CMOS 6 I SET_PLAY0 GPIO2 3 0 5 5 V CMOS 7 I SET_PLAY1 GPIO3 3 0 5 5 V CMOS 8 I SET_PLAY2 GPIO4 3 0 5 5 V CMOS 9 I SET_PLAY3 GPIO5 3 0 5 5 V CMOS 10 O MSG_RECEIVE GPIO6 3 0 5 5 V CM...

Page 9: ...D VDD 2 I SYSTEM_EN SYSTEM_EN 3 0 5 5 V CMOS 3 I SCKS SCLK SET_PLAY 1 SCKM 3 0 5 5 V CMOS 4 IO SIS SDA SET_PLAY 0 SOM 3 0 5 5 V CMOS 5 IO SOS SET_PLAY 2 SIM 3 0 5 5 V CMOS 6 IO MSG_RECEIVE SET_PLAY 3 MSG_RECEIVE 3 0 5 5 V CMOS 7 O SOUND_PLAYING SOUND_PLAYING 3 0 5 5 V CMOS CON3 8 P VSS VSS 4 Mini USB power supply connector CON6 This provides a single 5 V DC power supply from USB connector J7 on th...

Page 10: ...ay supporting interface mode by setting the CPLD interface mode combining SW7 2 and SW7 3 for Cinderella standalone demo operation For Cinderella standalone demo operation use in conjunction with S1V30080 ROM data I F mode settings For correlation of functions with interface mode refer to Table 2 5 SW7 4 External flash memory access control Selects whether to use data written to the external flash...

Page 11: ...a standalone demo functions For details refer to 3 2 Cinderella board standalone demo 10 CPLD and external flash memory power supply selection jumper JP1 Depends on the external power supply voltage Refer to Table 2 6 Table 2 6 Cinderella JP1 Host CPU board voltage JP1 3 0 3 6 V Short circuit Pin 1 to 2 3 6 5 5 V Short circuit Pin 2 to 3 With CASTLE connected 3 3 V 0 3 V Short circuit Pin 1 to 2 W...

Page 12: ...ng frequency and DAC bit width For details refer to the S1V30080 Series Hardware Specifications and S1V30080 Series Message Protocol Specifications 15 7 segment LED driver CPLD Drives the 7 segment LED according to the interface mode and displays the file index number on the 7 segment LED in Standalone 1 or Standalone 2 16 CPLD and external flash memory step down regulator Generates a 3 3 V 0 3 V ...

Page 13: ...diagram Figure 2 6 Cinderella block diagram VREG USB 5 0V 3 3V DIP SW 4 Push SW RESET S1V30080 GND SCKS SIS SOS SCLK SDA SET_PLAY0 VSS MSG_RECEIVE VSS SET_PLAY1 SET_PLAY2 SET_PLAY3 SOUND_PLAYING SYSTEM_EN VDD SCKS SIS SOS NSCSS VSS VDD MSG_RECEIVE SOUND_PLAYING SYSTEM_EN CPLD GND LED SERIAL FLASH Memory GND 10 10 7セグメント LED CON3 CON2 CON1 JP1 7 segment LED ...

Page 14: ...he CASTLE can also be used to control the S1V30080 on the Cinderella board Details of how to control the S1V30080 on the Cinderella board using the host CPU on the CASTLE are not included in this document Contact Seiko Epson for more information 2 3 1 CASTLE Part names and functions Figure 2 7 CASTLE board obverse side Figure 2 8 CASTLE board reverse side 3 4 5 10 1 3 4 6 8 9 11 12 2 7 ...

Page 15: ...nd is used when writing ROM data to the flash memory on the Cinderella board The CON1 pin layout is shown in Table 2 7 Table 2 7 CASTLE CON1 connector No I O CASTLE CON1 Cinderella J11 signal level 1 VDD1 5 V 2 VDD2 3 3 V 3 VDD3 1 8 V 4 CLOCK_OUT 5 NRESET 6 O SCKM SCKS_FLASH 3 3 V LVCMOS 7 O SOM SIS_FLASH 3 3 V LVCMOS 8 I SIM SOS_FLASH 3 3 V LVCMOS 9 O NSCSM NSCSM_FLASH 3 3 V LVCMOS 10 MSGRDY 11 S...

Page 16: ...V CMOS 9 O SET_PLAY3 SET_PLAY3 3 3 V CMOS 10 I MSG_RECEIVE MSG_RECEIVE 3 3 V CMOS 11 I SOUND_PLAYING SOUND_PLAYING 3 3 V CMOS 12 O SYSTEM_EN SYSTEM_EN 3 3 V CMOS 13 P VSS VSS 14 P VSS VSS 15 P VSS VSS CON2 16 P VSS VSS 3 Mini USB power supply connector This provides a single 5 V DC power supply from USB connector J3 on the CASTLE board When connected to the Cinderella board power is fed from the C...

Page 17: ...for system resetting the CASTLE board After turning on the power or altering the DIP switches always press SW6 to reset the system 8 CASTLE control push switches SW2 to SW5 Push switches SW2 to SW5 are used to control the CASTLE 9 S1C33E07 external memory selection jumper pin Check that JP1 is set to the default setting as shown in Table 2 9 Table 2 9 JP1 setting JP1 setting Remarks Short circuit ...

Page 18: ...hows the error indication patterns Table 2 10 LED indication patterns LED6 LED5 LED4 LED3 LED2 LED1 Description Flashing Flashing Flashing Flashing Flashing Flashing When power is turned on flashes repeatedly 3 times Off Off Off On Off On Cinderella board data writing mode On On On On On On Cinderella board data writing complete Table 2 11 Error indication patterns LED6 LED5 LED4 LED3 LED2 LED1 De...

Page 19: ...ock diagram Figure 2 9 CASTLE board block diagram S1C33E07 VREG USB 5 0V 2 3 3V ICD I F 6 14 7456MHz 32 768kHz VREG 1 8V SST Flash SRAM 21 16 3 3V FET 7 microSD I F 8 3 3V FET Buf OE 6 DIP SW 4 Push SW RESET GND VDD2 VDD3 NRESET SCKM SOM SIM NSCSM MSGRDY STBYEXIT CLOCK_OUT GPIO0 GPIO1 GPIO2 GPIO3 VSS 6 GND LED VDD1 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8 GPIO9 ...

Page 20: ...rella and CASTLE connection This section explains how to connect the CASTLE board to the Cinderella board Insert CON1 and CON2 on the Cinderella board into CON1 and CON2 on the CASTLE board Connections are unidirectional Figure 2 10 shows the Cinderella and CASTLE boards connected Figure 2 10 ...

Page 21: ...memory by connecting the Cinderella to the CASTLE S1V30080 ROM data contained in the micro SD card inserted in the CASTLE board can be written to the Cinderella flash memory Data written can be accessed using Cinderella standalone demos or by connecting an external host CPU Note The product warranty does not cover using the CASTLE to write ROM data to a board other than the Cinderella board ...

Page 22: ...able 3 2 Press CASTLE reset switch SW6 once to initialize CASTLE and Cinderella boards Insert micro SD card containing ROM data into CASTLE micro SD connector For details of micro SD refer to 3 1 2 Cinderella board data writing micro SD card Connect CASTLE to Cinderella Refer to Figure 2 10 Press CASTLE SW2 once to start writing to Cinderella flash memory Writing is complete when CASTLE LED1 to LE...

Page 23: ...rol Selects whether to use data written to the external flash memory or S1V30080 internal ROM data On S1V30080 internal ROM access Do not access from the S1V30080 to write from the flash memory write connector CON1 SW7 5 External flash memory write protection Off Permits external flash memory writing SW7 6 Test switch On Default Table 3 2 CASTLE SW1 settings for writing data to Cinderella board SW...

Page 24: ... micro SD card and the card is inserted into the card slot on the CASTLE board Table 3 3 Storage file File name Description ROMImage_YYMMDD_HHMMSS bin ROM data to be written to the Cinderella flash memory The file name includes the date and time the file was created This file is generated by the S1V30080 Series Sound Tool For more details of the S1V30080 Series Sound Tool refer to the S1V30080 Ser...

Page 25: ...be Standalone 1 or Standalone 2 CPLD and external flash memory power supply selector jumper JP1 Set to short circuit pins 2 to 3 Set Cinderella DIP switch SW7 as shown in Table 3 4 Connect speaker cable provided to Cinderella voice output connector CON5 and connect speaker to jack Press CASTLE reset switch SW1 once to initialize Cinderella board Use Cinderella standalone demo control push switches...

Page 26: ...demo 2 SW7 3 SW7 2 Interface mode OFF ON Standalone 1 OFF OFF Standalone 2 3 2 1 Standalone mode 1 control The Cinderella standalone demo control push switches SW2 to SW5 are as shown in Table 3 6 for Standalone mode 1 Table 3 6 Standalone 1 push switch SW2 to SW5 functions SW2 to 5 Interface SW5 SW4 SW3 SW2 Standalone 1 SET_PLAY 3 SET_PLAY 2 SET_PLAY 1 SET_PLAY 0 The status of push switches SW2 t...

Page 27: ...nctions SW2 to 5 Interface SW5 SW4 SW3 SW2 Standalone 2 START File index number 0x10 digit File index number 0x01 digit STOP SW3 and SW4 are used to specify the file index number SW4 specifies the higher order digit in hexadecimal and SW3 specifies the lower order digit The file index number is determined by the number of times SW3 and SW4 are pressed For example to specify file index number 21 0x...

Page 28: ...l ROM host interface mode for internal ROM set when creating ROM data For details of how to create ROM data refer to the S1V30080 Series Sound Tool User Guide For details of S1V30080 specifications refer to the S1V30080 Series Hardware Specifications and S1V30080 Series Message Protocol Specifications Refer to Table 2 6 and set CPLD and external flash memory power supply selector jumper JP1 to sui...

Page 29: ...internal ROM access SW7 5 External flash memory write protection On Protects external flash memory data SW7 6 Test switch On Default Table 3 10 External host CPU interface cable connection connector No I O Cable color S1V30080 input output pin signal level 1 P Brown VDD 3 to 5 5 V 2 I Red SYSTEM_EN 3 0 5 5 V CMOS 3 I Orange SCKS SCL SET_PLAY1 3 0 5 5 V CMOS 4 I Yellow SIS SDA SET_PLAY0 3 0 5 5 V C...

Page 30: ...The Cinderella voice output connector CON5 is a differential output due to speaker amplifier IC specifications Care must be taken to avoid short circuiting the voice output signal to other signals especially GND when connecting devices as this may damage the speaker amplifier IC In particular avoid connecting devices with power supplies such as PCs Figure 4 3 Device connection to voice output pin ...

Page 31: ... and external flash memory power supply selector jumper pin J6 This must be set as shown in Table 2 6 according to the external power supply voltage In particular avoid short circuiting pins 1 to 2 on JP1 with a 5 V supply as this will subject the CPLD and external flash memory to a voltage exceeding the specifications resulting in damage 4 5 Micro SD card precautions The micro SD card provided wi...

Page 32: ...am S1V30080 Series Evaluation Board User s Guide EPSON 29 Rev 1 00 5 Board Circuit Diagram The S1V30080 evaluation kit circuit diagrams are shown below Cinderella circuit diagrams P30 to 32 CASTLE circuit diagrams P33 to 34 ...

Page 33: ...IO GCLK3 64 VccINT 63 IO GCLK2 62 I O 61 GNDIO 60 VCCIO2 59 I O 58 I O 57 I O 56 I O 55 I O 54 I O 53 I O 52 I O 51 I O 100 I O 99 I O 98 I O 97 I O 96 I O 95 VccIO2 94 GNDIO 93 I O 92 I O 91 I O 90 I O 89 I O 88 I O 87 I O 86 I O 85 I O 84 I O 83 I O 82 I O 81 VccIO2 80 GNDIO 79 I O 78 I O 77 I O 76 I O 1 I O 2 I O 3 I O 4 I O 5 I O 6 I O 7 I O 8 VccIO1 9 GNDIO 10 GNDINT 11 IO GCLK0 12 VccINT 13 ...

Page 34: ... A8 10 GND 11 GND 12 GND 13 B8 14 B7 15 B6 16 B5 17 B4 18 B3 19 B2 20 B1 21 OE 22 VCCB 23 VCCB 24 U9 SN74LVC8T245 U9 SN74LVC8T245 C24 1u C24 1u C20 0 1u C20 0 1u TP1 TP1 SCKS 1 SOS 2 MSG_RECIEVE 3 GPO1 4 FLASH_EN 5 VSS 6 VDD 7 LVDD 8 NC 9 GPO2 10 CE 11 SYSTEM_EN 12 NC 13 NC 14 NC 15 NC 16 NC 17 NC 18 NC 19 NC 20 NC 21 NC 22 NC 23 NC 24 NC 37 NC 38 NC 39 NC 40 NC 41 NC 42 NC 43 NC 44 NC 45 NC 46 NC...

Page 35: ... G 3 9 2 2 C 2 D E F 3 9 2 2 G 3 9 2 2 DGND C 9 C 9 C 9 C 9 DGND 9 0 4 6 I B 3 9 0 4 6 I B 3 9 0 4 6 I B 3 9 0 4 6 I B 3 DGND 3 4 4 5 3 4 4 5 3 4 4 5 3 4 4 5 DGND Confidential Reference R6 5 6k R6 5 6k C29 6 8n C29 6 8n C38 10p C38 10p R9 0 R9 0 C32 6 8n C32 6 8n C25 1u C25 1u R12 5 6k R12 5 6k L1 BLM18PG121SN1 L1 BLM18PG121SN1 TP5 TP5 L2 BLM18PG121SN1 L2 BLM18PG121SN1 C40 10p C40 10p VBAS 1 D 2 D...

Page 36: ... 0 1u LED1 BR1111C C24 0 1u SW6 SKHLACA010 C18 0 1u C7 0 1u U2 SST34HF3284 A1 D1 A2 C1 A3 B1 A4 D2 A5 C2 A6 B2 A7 A2 A8 A6 A9 C6 A10 D6 A11 A7 A12 B7 A13 C7 A14 D7 A15 B8 A16 E8 A17 D3 A18 C3 A19 B6 A20 C5 NC C8 BEF F1 BES1 G1 BES2 B5 UBS B3 LBS A3 OE F2 WE A5 WP A4 RST B4 DQ0 G2 DQ1 E3 DQ2 H3 DQ3 F4 DQ4 F5 DQ5 H6 DQ6 E6 DQ7 G7 DQ8 H2 DQ9 F3 DQ10 G3 DQ11 H4 DQ12 G6 DQ13 F6 DQ14 H7 DQ15 A 1 F7 NC H...

Page 37: ...28 100k U5 BH18LB1WG VIN 1 GND 2 STBY 3 NC 4 VOUT 5 J2 ST2S008V1A Dummy F1 DetectB D2 DetectA D1 No 1 1 Dummy F2 No 2 2 No 3 3 No 4 4 No 5 5 No 6 6 No 7 7 Dummy F3 No 8 8 Dummy F4 C37 0 1u C38 10u C33 0 1u R21 0 R16 10k C32 10u Q1 FDC6329L 4 4 5 5 6 6 1 1 2 2 3 3 TP6 TEST PAD R17 68k R13 68k U3 SN74CBTLV3861DGVR NC 1 A1 2 A2 3 A3 4 A4 5 A5 6 A6 7 A7 8 A8 9 A9 10 A10 11 OE 23 B10 13 B9 14 B8 15 B7 ...

Page 38: ...Revision History S1V30080 Series Evaluation Board User s Guide EPSON 35 Rev 1 00 Revision History Revision details Date Rev Page Category Details 3 3 2009 1 00 All New ...

Page 39: ...518057 CHINA Phone 86 755 2699 3828 FAX 86 755 2699 3838 EPSON HONG KONG LTD 20 F Harbour Centre 25 Harbour Road Wanchai Hong Kong Phone 852 2585 4600 FAX 852 2827 4346 Telex 65542 EPSCO HX EPSON TAIWAN TECHNOLOGY TRADING LTD 14F No 7 Song Ren Road Taipei 110 TAIWAN Phone 886 2 8786 6688 FAX 886 2 8786 6660 EPSON SINGAPORE PTE LTD 1 HarbourFront Place 03 02 HarbourFront Tower One Singapore 098633 ...

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