Epson S1S65010, Technical Manual

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5. FUNCTIONAL DESCRIPTION
S1S65010
EPSON
15
Evaluation Board Technical Manual (Rev. 1.1e)
5.7. External Memory Control Signal Monitor Connector (CN9)
(7) in Figure 5.1
The 12-pin connector (CN9) on this board is for monitoring control signals for external memory mounted on
this evaluation board. The following Table lists the pin assignments.
Pin Number Function Pin Number Function
1 MCS0# 2 MDQML
3 MCS1# 4 MDQMH
5 MCS2# 6 MCAS#
7 MOE# 8 MRAS#
9 MWE0# 10
MCLKEN
11 MWE1# 12 MCLK
5.8. External Memory Expansion SOLDER_JP (JP1-JP3)
(8) to (10) in Figure 5.2
This evaluation board has JP2 and JP3 soldered together because it ships with 4 MB of Flash ROM in the
external memory space. JP1 permits expansion to 8 MB. The default JP1 is no connection.
Connection
Source
Connection
Target
Function
JP1 GPIOB6 MA22 GPIOB6 functions as MA22
JP2 GPIOD1 MA21 GPIOD1 functions as MA21
JP3 GPIOD0 MA20 GPIOD0 functions as MA20
Note: The firmware must configure the S1S65010 pins GPIOD0, GPIOD1, and GPIOB6 to match.
5.9. CF Card Interface SOLDER_JP (JP6, JP7)
(11) to (12) in Figure 5.2
The JP6 and JP7 SOLDER_JP on this board control the connection of pull-up and pull-down resistances to this
evaluation board’s CF card interface BVD2/DASP signal.
Connection
Source
Connection
Target
Function
JP6 BVD2/DASP Pull_Up Forces logic level “1” input for BVD2/DASP
JP7 BVD2/DASP Pull_Down Forces logic level “0” input for BVD2/DASP