Epson S1C31D01 Software Manual Download Page 1

Page: 1 / 70

Rev.3.00

CMOS 32-BIT SINGLE CHIP MICROCONTROLLER

S1C31D01

Peripheral Circuit

Sample Software Manual

Summary of Contents for S1C31D01

Page 1: ... Rev 3 00 CMOS 32 BIT SINGLE CHIP MICROCONTROLLER S1C31D01 Peripheral Circuit Sample Software Manual ...

Page 2: ...ies contained in this material or due to its application or use in any product or circuit and further there is no representation that this material is applicable to products requiring high level reliability such as medical products Moreover no license to any intellectual property rights is granted by implication or otherwise and there is no representation or warranty that anything made in accordan...

Page 3: ...ting 17 2 4 5 Flash Loader Setting 19 2 4 6 Project Build 21 2 4 7 Project Download and Debug 22 2 5 MDC Tools 23 2 5 1 Image Scaling Calculation imgcpy_calcscaling exe 23 2 5 2 Font Conversion MDCFontConv exe 25 2 5 3 Image Conversion MDCImgConv exe 26 2 5 4 Serial Flash Programming MDCSerFlashImg exe 27 2 6 Flash Programming Tools 28 3 Details of Sample Software 29 3 1 Clock Generator CLG 29 3 2...

Page 4: ...age Detection Circuit SVD3 52 3 18 16 Bit Timer T16 53 3 19 16 bit PWM Timer T16B 54 3 20 Temperature Sensor and Voltage Reference TSRVR 55 3 21 UART UART3 56 3 22 USB CDC Device USB_CDC 57 3 23 USB HID USB_HID_S5U1C31D01T1 58 3 24 USB MSC Device USB_MSC 59 3 25 WatchDog Timer WDT2 60 3 26 Flash Programming Flash 61 3 27 EEPROM Emulation Library EEPROM 62 3 28 Boot Loader BootLoader 63 Appendix Us...

Page 5: ... selected peripheral and exercises various peripheral modes The S1C31D01 hardware definition file defines the hardware register addresses access sizes and access read write types The individual registers and their fields are accessed based on the described hardware file The Peripheral Library also provides easy to use methods which perform complex peripheral functions Those methods include functio...

Page 6: ...he software is shown in Figure 2 1 1 The application layer can access peripheral hardware through the Peripheral library routines or directly using the structures defined in the S1C31D01 h hardware definition file Example projects CLG MDC PPORT QSPI REMC3 RTCA T16 T16B Peripheral library project se_clg c se_mdc c se_pport c se_qspi c se_remc3 c se_rtca c se_t16 c se_t16b c se_clg h se_mdc h se_ppo...

Page 7: ...g is performed in the BoardInit function to achieve higher CPU clock accuracy IOSC trimming is not performed This results in a shorter boot time CACHE_ENABLED The cache is enabled for the Flash targets No importance for Debug targets The cache is not enabled for the Flash targets TICKLESS_ENABLED SYSTICK interrupt is disabled SYSTICK interrupt is used to keep track of the elapsed CPU time since th...

Page 8: ...he USB adapter for UART UART communication with the PC becomes possible The picture in Figure 2 2 2 1 and the diagram in Figure 2 2 2 2 show the connection for an USB Adapter for UART to the S5U1C31D01T1 evaluation board To perform UART communication it is necessary to build the sample program with the definition of UART_PRINTF in the settings h file enabled see Section 2 1 and Table 2 1 1 In addi...

Page 9: ...or Terminal Software Parameter Setting Value Baud rate 115200 bps Data 8 bits Stop bits 1 bits Parity None For more information on S5U1C31D01T1 evaluation board refer to the S5U1C31D01T1 Manual Notes USB adapter for UART used in Figure 2 2 2 1 is a commercial product not provided by Seiko Epson Please purchase as necessary ...

Page 10: ...istrator Review the license terms before proceeding with installation Select desired folder package to be installed into and select Install After the software has been installed into the destination a setup utility called ToolchainSetup exe will automatically launch Press Next on setup utility and select your preferred versions of IAR EWARM identified by the checkboxes Note The setup utility will ...

Page 11: ... software projects select the File Open Workspace in the IAR EWARM menu navigate to Examples WORKSPACE S5U1C31D01T1 IAR folder and open the Examples eww file Optionally each sample software project subfolder has a board S5U1C31D01T1 IAR subfolder which contains an IAR project file ewp and an IAR workspace file eww To open the workspace for an individual sample software project select the File Open...

Page 12: ...ndow the active project and build configuration can be selected at the same time Figure 2 3 3 1 As shown below each sample software project contains three build configurations Debug Build configuration to execute code in internal RAM memory The optimization level is set to low DebugFlash Build configuration to execute code in internal flash memory The optimization level is set to low ReleaseFlash ...

Page 13: ...sary To select the debug probe driver follow the procedure below 1 Select the Project Option in the IAR EWARM menu 2 Select the Debugger in the Category list on the Options for node project dialog Figure 2 3 4 1 3 Select the Setting tab and then select the debug probe in the Driver drop down list as shown below Figure 2 3 4 1 When using the I jet select the I jet JTAGjet When using the J Link sele...

Page 14: ...alog Figure 2 3 5 1 3 Select the Download tab Figure 2 3 5 1 4 Disable the Use flash loader s checkbox Figure 2 3 5 1 When the build configuration is DebugFlash or ReleaseFlash program execution in internal flash memory 1 Select the Project Option in the IAR EWARM menu 2 Select the Debugger in the Category list on the Options for node project dialog Figure 2 3 5 1 3 Select the Download tab Figure ...

Page 15: ...oject QSPI Debug build seGraphicsLibrary Debug and sePeriphLibrary Debug Also the batch build option to build all the projects included in the sample software at once is available To use the batch build option select the Project Batch build in the IAR EWARM menu Figure 2 3 6 1 And then select the desired build configuration on the displayed dialog box and click the Make or Rebuild All button Figur...

Page 16: ...12 Seiko Epson Corporation S1C31D01 Peripheral Circuit Sample Software Manual Rev 3 00 Figure 2 3 6 2 Batch Build ...

Page 17: ...target board To download the program image select the Project Download and Debug in IAR EWARM menu Figure 2 3 7 1 When the active project is Debug build the program image is loaded in the internal RAM and debugging is started When the active project is DebugFlash build or ReleaseFlash build the program image is loaded in the internal flash memory and debugging is started Figure 2 3 7 1 Download an...

Page 18: ... package to be installed into and select Install After the software has been installed into the destination a setup utility called ToolchainSetup exe will automatically launch Press Next on setup utility and select your preferred versions of uVision identified by the checkboxes Note The setup utility will copy some flashing binaries into your uVision folders Select preferred version of a debugger ...

Page 19: ...Open Project in the uVision menu navigate to Examples WORKSPACE S5U1C31D01T1 ARM folder and open the Examples eww file Optionally each sample software project subfolder has a board S5U1C31D01T1 ARM subfolder which contains a uVision project file uvprojx and a uVision multi project workspace file uvmpw To open the workspace for an individual sample software project select the Project Open Project i...

Page 20: ...ct the Set as Active Project in right clicked menu Figure 2 4 3 1 Next select the build configuration listed in the drop down list on the tool bar of uVision Figure 2 4 3 2 As shown below each sample software project contains two build configurations Debug Build configuration to execute code in internal RAM memory DebugFlash Build configuration to execute code in internal flash memory Figure 2 4 3...

Page 21: ...e J Link J TRACE Cortex from the drop down list at the right side of Use checkbox Figure 2 4 4 1 4 Click the Settings button at the right side of the above drop down list Figure 2 4 4 1 5 Select the SW from the Port drop down list in the Cortex JLink JTrace Target Driver Setup dialog box 6 Click the all OK button to close all dialogs Notes This setting needs to be done with J Link connected to the...

Page 22: ...18 Seiko Epson Corporation S1C31D01 Peripheral Circuit Sample Software Manual Rev 3 00 Figure 2 4 4 2 J Link Driver Setup ...

Page 23: ... 5 2 When the build configuration is DebugFlash program execution on internal flash memory 1 Select the Project Options for project name Target build configuration in the uVision menu 2 Switch the Debug tab in the Options for Target build configuration dialog 3 Leave blank the Initialize File edit box 4 Switch the Utilities tab in the Options for Target build configuration dialog and then click th...

Page 24: ...20 Seiko Epson Corporation S1C31D01 Peripheral Circuit Sample Software Manual Rev 3 00 Figure 2 4 5 1 Initialize File Option Figure 2 4 5 2 Flash Loader Unsetting Figure 2 4 5 3 Flash Loader Setting ...

Page 25: ...t the library projects sePeriphLibrary and seGraphicsLibrary are not built Build these library projects and then build the active project again The Batch Build option found under Project Batch Build in the uVision menu can be used to build all the Examples and by default constructs both the Debug and DebugFlash builds for each of the appropriate projects The projects in the list are ordered such t...

Page 26: ... program image select the Flash Download in uVision menu Figure 2 4 7 1 When the active project is Debug build the program image is loaded in the internal RAM When the active project is DebugFlash build the program image is loaded in the internal flash memory To debug the program image downloaded to the target board select the Debug Start Stop Debug Session in uVision menu Figure 2 4 7 2 Figure 2 ...

Page 27: ...m edge of the source image are not copied In order to compensate for this hardware limitation and copy 208x208 pixels to the destination image please use the compensated values calculated by this utility tool The usage of this utility tool is as follows 1 Run the imgcpy_calcscaling exe Then the console screen will open 2 Input the original source image size and the original destination image size ...

Page 28: ...ng value of 257 and right bottom scaling value of 252 results in all pixels of the 210x210 source image copied to the 208x208 destination image Note This utility tool has a limitation Not all input and output dimension pairs are possible to correctly calculate and the utility will warn the user of that if it is unable to determine a good result If the utility will gives warning such as Cannot get ...

Page 29: ...fields bitmapfmt specifies the bitmap format 0 1 bit 1 2 bit height specifies the height of each and every character bitmap in pixels numchars number of characters in the font set asciioffset ASCII offset of first character in the font set charstbl pointer to a table of width offsetloc pairs for the characters in the font set width is the width of the character bitmap and offsetloc is the offset l...

Page 30: ...ut affecting the image The output file h hex and mdcimg contains a seMDC_ImgStruct structure which has the following fields width width of the image in pixels height height of the image in pixels stride stride of the image in pixels same value as width imgtype specifies the MDC image format pxdata pointer to byte array of the image pixels The C header output file h can be used in C code to include...

Page 31: ...nload the binary image into N25Q128 Serial NOR Flash memory using the SEGGER J Link Commander software Refer to Section 0 for instructions on installing the SEGGER Flash programming tools for the S5U1C31D01T1 evaluation board The output C header file h contains seMDC_GFX_SerFlashFontStruct and seMDC_SerFlashImgStruct structures for all the fonts and images included in the output binary image The s...

Page 32: ...tware and Documentation Pack from the following SEGGER link https www segger com downloads jlink After the SEGGER J Link software has been installed follow the instructions provide in the FlashTools S5U1C31D01T1 README txt file of the S1C31D01 Sample Software package to install the flash loader binaries for the S1C31D01 internal Flash and the N25Q128 Serial NOR Flash into the SEGGER installation f...

Page 33: ...upply to the CPU and the peripheral circuits The example executes various CLG functions such as starting OSCs setting Wake up clocks and sleep modes Operations 1 Initializes CLG 2 Run auto trimming of IOSC 3 Verifies Sleep or Halt states running various clocks 4 Verifies Wakeup states running various clocks Example of Output CPU clock seCLG_IOSC 20000000 CLG Initialization ok CLG IOSC Auto trimmin...

Page 34: ...Channel 2 is configured to transfer the contents of a data buffer stored in RAM to the reception buffer in RAM Access size is Word The start of transfer is triggered by software In this example 1 The DMAC interrupts in NVIC are not enabled 2 DMAC Channel transfer is enabled 3 Source and destination addresses incrementing is enabled 4 The transfer is started by setting the Software Request register...

Page 35: ...ory to Peripheral transfer ex2 is used to output characters back to the terminal window 11 Correctness of the transfer is verified by seeing correct characters displayed in the terminal window Example 4 Concurrent Peripheral to Memory and Memory to Peripheral DMA transfers T16B_0 sub channel 0 is configured for compare mode T16B_0 sub channel 1 is configured for capture mode DMAC Channel 0 is conf...

Page 36: ...pheral Circuit Sample Software Manual Rev 3 00 Example of Output CPU clock seCLG_IOSC 20000000 DMA Initializing DMA Test Memory DMA Test SNDA DMA Test UART Type 8 characters 12345678 8 characters have been sent back to UART DMA Test T16B Exit ...

Page 37: ...te and read 0x5A to the CTRL_REG3 register 0x22 of the L3GD20 gyroscope 8 Write and read 0xA5 to the CTRL_REG3 register 0x22 of the L3GD20 gyroscope 9 Write and read 0x3C to the CTRL_REG5 register 0x24 of the L3GD20 gyroscope 10 Write and read 0xC3 to the CTRL_REG5 register 0x24 of the L3GD20 gyroscope 11 Read the WIA1 register 0x00 of the AK09911C magnetometer 12 Read the WIA2 register 0x01 of th...

Page 38: ...ter 0x22 0xA5 Pass Read CTRL_REG3 register 0x22 0xA5 Pass Write CTRL_REG5 register 0x24 0x3C Pass Read CTRL_REG5 register 0x24 0x3C Pass Write CTRL_REG5 register 0x24 0xC3 Pass Read CTRL_REG5 register 0x24 0xC3 Pass AK09911C magnetometer registers read write tests Read WIA1 register 0x00 0x48 Pass Read WIA2 register 0x01 0x05 Pass Read INFO1 register 0x02 0x20 Pass Read INFO2 register 0x03 0x00 Pa...

Page 39: ... 2 Initialize LPM012M134B panel 3 Set output destination window for MDC graphics engine 4 Fill display buffer with white background 5 Draw line ticks 1 minute intervals for analog clock 6 Initialize and start RTC 7 Infinite while loop Read latest time from RTC Draw circles in center of analog clock Animation loop 3 times Render bigger weekday text as needed Draw line for second hand Render hour ha...

Page 40: ...e tool Archivo_Black_28_1bit mdcfont Source_Code_Pro_Black_28_1bit mdcfont watchhand_21x100 mdcimg Operations 1 Start OSC1 and change IOSC frequency to 20MHz 2 Initialize LPM012M134B panel 3 Set output destination window for MDC graphics engine 4 Fill display buffer with white background 5 Draw line ticks 1 minute intervals for analog clock 6 Initialize and start RTC 7 Infinite while loop Read lat...

Page 41: ... 3 JP6 connect pin 1 and 2 JP7 connect pin 1 and 2 JP8 connect pin 5 and 6 Operations 1 Start OSC1 and change IOSC frequency to 20MHz 2 Initialize LS012B7DH02 panel 3 Set output destination window for MDC graphics engine 4 Fill display buffer with white background 5 Draw line ticks 1 minute intervals for analog clock 6 Initialize and start RTC 7 Infinite while loop Read latest time from RTC Draw c...

Page 42: ...when the level changes from Low to High 5 Output a High level signal from the P35 port 6 Confirm that the P36 port is at High level after an interrupt in the P36 port 7 Set the P36 port so that an interrupt occurs when the level changes from High to Low 8 Output a Low level signal from the P35 port 9 Confirm that the P36 port is at Low level after an interrupt in the P36 port Start the OSC1 oscill...

Page 43: ... following flash actions are taken consecutively for three QSPI modes Quad mode Erase sector Program Sector Read and compare sector Dual mode Erase sector Program Sector Read and compare sector Single mode Erase sector Program Sector Read and Compare sector Example of Output CPU clock seCLG_IOSC 20000000 Get bus speed 77519 Set bus speed 10000000 Get bus speed 10000000 QSPI Start OK Read external ...

Page 44: ...son Corporation S1C31D01 Peripheral Circuit Sample Software Manual Rev 3 00 Erase flash sector in SINGLE mode OK Program flash in SINGLE mode OK Read flash in SINGLE mode OK Compare R W data in SINGLE mode OK Exit ...

Page 45: ...re checks if it can read the External Flash mode register correctly 6 Then it reads Flash ID 7 If the flash operations succeed software performing following flash actions Erase Sector Program Sector using register access DMA transfers Read Sector using register access DMA transfers and compare with the programmed pattern 8 The example software configures QSPI controller to Memory mapped mode 9 At ...

Page 46: ... connections for these resistors are restored after evaluating the QSPI master slave sample programs 2 Connect the evaluation boards where the QSPI master slave sample programs are installed Connect each port as follows DUAL or QUAD mode master slave TH34 QSDI0n3 QSDIOn3 TH34 TH36 QSDI0n2 QSDIOn2 TH36 TH38 QSDI0n1 QSDIOn1 TH38 TH39 QSDI0n0 QSDIOn0 TH39 TH40 QSPICLKn QSPICLKn TH40 TH32 QSPISSn QSPI...

Page 47: ...random data to the slave 5 Receive the BUF_SIZE bytes of data from the slave 6 Compare whether the received data is the same as the sent data and exit Example of Output For Double Quad Mode CPU clock seCLG_IOSC 20000000 Get bus speed 123456 Set bus speed 100000 Get bus speed 100000 Set QSPI_0 in DUAL mode OK 1 NG 0 OK 2 NG 0 OK 3 NG 0 OK 4 NG 0 OK 5 NG 0 OK 6 NG 0 OK 7 NG 0 OK 8 NG 0 OK 9 NG 0 OK ...

Page 48: ...44 Seiko Epson Corporation S1C31D01 Peripheral Circuit Sample Software Manual Rev 3 00 OK 4 NG 0 OK 5 NG 0 OK 6 NG 0 OK 7 NG 0 OK 8 NG 0 OK 9 NG 0 OK 10 NG 0 ...

Page 49: ...0 R35 Note Ensure that the 0 ohm connections for these resistors are restored after evaluating the QSPI master slave sample programs 2 Connect the evaluation boards where the QSPI master slave sample programs are installed Connect each port as follows DUAL or QUAD mode master slave TH34 QSDI0n3 QSDIOn3 TH34 TH36 QSDI0n2 QSDIOn2 TH36 TH38 QSDI0n1 QSDIOn1 TH38 TH39 QSDI0n0 QSDIOn0 TH39 TH40 QSPICLKn...

Page 50: ...perations 1 Initialize the QSPI module in slave mode as below Data length is 8bit Data format is MSB first 2 Assign GPIO P36 as input and enable interrupt on rising edge to detect a start of communication 3 Receive the BUF_SIZE bytes of random data from the master 4 Send the BUF_SIZE bytes of data back to the master Example of Output Slave has no output ...

Page 51: ...ction of the SW2 to SW3 Data is allocated when a switch interrupt occurs 2 Further initialization consists of configuration of switches SW2 to SW3 allocation ports for REMO and initialization of T16 Ch 0 Then CPU enters into the halt mode to wait for interrupts caused by pushing switches SW2 to SW3 3 When an interrupt occurs allocate data s APLEN and DBLEN values Since REMC3 uses a buffer mode REM...

Page 52: ...eeping 6 Starts 1 second timer to perform trimming 7 Checks stop watch operations Example of Output CPU clock seCLG_IOSC 20000000 RTCA TRM bits 0x43 RTCA Set hour 4 PM minute 17 second 0 RTCA Get hour 4 PM minute 17 second 0 RTCA Set year 15 month 2 day 5 Thursday RTCA Get year month day 2015 2 5 Thursday RTCA Set Alarm hour 4 PM minute 17 second 5 RTCA waiting for alarm RTCA Alarm occurred hour 4...

Page 53: ...to generate various tones and music Operations 1 Example starts OSC1 and initializes SNDA 2 SNDA runs in normal buzzer mode for 5 sec 3 SNDA runs in one shot buzzer mode for 250msecs 4 SNDA runs in melody mode Example of Output CPU clock seCLG_IOSC 20000000 Start SNDA in normal buzzer mode for 5 sec Start SNDA in one shot buzzer mode 250ms Start SNDA in melody mode Start SNDA playing of Postoj Par...

Page 54: ...2 SDIn SDOn P33 P33 SDOn SDIn P32 P34 SPICLKn SPICLKn P34 P35 SPISSn P35 P36 P36 J2 47 GND GND J2 47 2 Launch the slave example program first then the master program Operations 1 Initialize the SPIA module in master mode as below Data length is 8bit Data format is MSB first Use 16 bit timer T16_1 for baud rate generator 2 Set bus speed to 1000000 3 Assign GPIO P36 as output to set Read Write comma...

Page 55: ...ct the evaluation boards where the SPIA master slave sample programs are installed Connect each port as follows master slave P32 SDIn SDOn P33 P33 SDOn SDIn P32 P34 SPICLKn SPICLKn P34 P35 SPISSn P35 P36 P36 J2 47 GND GND J2 47 2 Launch the slave example program first then the master program Operations 1 Initialize the SPIA module in slave mode as below Data length is 8bit Data format is MSB first...

Page 56: ... evaluation board configured to power from the debugger adapter A jumper across J2 35 and J2 36 must be installed Connect evaluation board to PC by USB cable Operations 1 Software prepares to watch the VDD pin dropping the voltage below some limit 2 USB cable is disconnected 3 Software detects voltage drop and reports it on the terminal Example of Output CPU clock seCLG_IOSC 20000000 SVD is config...

Page 57: ...at occurred within a 5 second interval Operations 1 IOSC is selected as timer clock source Example code does IOSC auto trimming to provide clock accuracy for the timer clock 2 Initializes T16 channel 0 3 Configures T16 channel 0 interrupts 4 Enables T16 interrupts 5 Counts a number of interrupts happened during 5 second interval Example of Output CPU clock seCLG_IOSC 20000000 CLG IOSC Auto trimmin...

Page 58: ...rrupts Number of capture interrupts Number of maximum count interrupts Number of count zero interrupts 5 When a compare interrupt occurs set the trigger signal for capture to HIGH 6 When a maximum count interrupt occurs set the trigger signal for capture to LOW Example of Output CPU clock seCLG_IOSC 20000000 Comparator Count 0x2000 Timer Count 0x0010 Max Count 0x5000 Interrupt Max Count 10 Interru...

Page 59: ...panel connected to connector CN3 of the S5U1C31D01T1 evaluation board Operations 1 Start OSC1 and change IOSC frequency to 20MHz 2 Initialize temperature reading routines 3 Initialize LPM012M134B panel 4 Set output destination window for MDC graphics engine 5 Fill display buffer with white background 6 Draw line ticks 1 minute intervals for analog clock 7 Initialize and start RTC 8 Infinite while ...

Page 60: ...1 3 and on Figure 2 2 1 4 2 Run a terminal program 3 Configure terminal program for baud rate 115200 8 data bits 1 stop bit no parity Operations 1 Example initializes UART3 as below Baud rate is 115200 Data length is 8bit Stop bit length is 1bit Parity is Non parity 2 ASCII characters are transmitted from UART3 and displayed in the terminal program window 3 Then the Example program waits for the i...

Page 61: ...le is a USB target device controller that supports FS mode based on the USB 2 0 standard The Example code for USB module is a CDC ACM COM PORT The example application echoes back the character received from the COM PORT Hardware Setup Jumper on J2 pins 35 and 36 must be installed Connect evaluation board to PC by USB cable ...

Page 62: ... be formatted as reports whose structure is defined in the report descriptor HID devices must respond to standard HID requests in addition to all standard USB requests Hardware Setup 1 Jumper on J2 pins 35 and 36 must be installed 2 Example requires an LPM012M134B panel connected to connector CN3 of the S5U1C31D01T1 evaluation board 3 Connect the evaluation board to PC by USB cable Operations 1 On...

Page 63: ... FS mode based on the USB 2 0 standard The Example code for USB module is an MSC device The example application presents a RAM disk drive with a README txt file to the PC Hardware Setup 1 Jumper on J2 pins 35 and 36 must be installed 2 Connect the evaluation board to PC by USB cable Example of Output CPU clock seCLG_IOSC 20000000 Reset Suspend Resume Reset Reset Configure ...

Page 64: ...hen WDT2 is reset 5 Third scenario shows Reset after NMI mode when WDT2 is not reset Example of Output CPU clock seCLG_IOSC 20000000 WDT Clock source 1 WDT Clock divider 0 WDT CLK 250 Hz CMP count 1023 WDT 4 secs cycle is set NMI interrupts due to comparator match in NMI Mode WDT NMI interrupts 1 Watchdog timer was reset in Reset and NMI Mode Chip was alive after NMI WDT Clock source 1 WDT Clock d...

Page 65: ... the Uninitialize function to make the flash driver uninitialized Usage Notes of seFlashLibrary Please note the the following points when using this library Make sure to disable interrupts before calling functions provided in this library When executing this library do not destroy the area where the library is placed When using this library pay attention to the number of times Flash memory can be ...

Page 66: ...OM and the number of the retries edit Driver_EEPROM h to redefine the constants shown below defineCONFIG_EEPROM_SIZE_MAX 512 defineCONFIG_RETRY_COUNT 4 The CONFIG_EEPROM_SIZE_MAX indicaates the size of the emulated EEPROM This size can be selected one of 32 64 128 256 512 The CONFIG_ RETRY_COUNT indicates the number of write retries when a writing has failed Increasing the number of write retries ...

Page 67: ...orporation 63 Sample Software Manual Rev 3 00 3 28 Boot Loader BootLoader This example loads a program transmitted from the outside by UART communication For details of this example refer to S1C31D01 Boot Loader Manual on the separate document ...

Page 68: ...Available Available DMAC Available Available Flash Available Available EEPROM Available Available I2C_S5U1C31D01T1 Available Available MDC_LPM012M134B N A N A MDC_LPM012M134B_SERFLASH N A N A MDC_LS012B7DH02 N A N A PPORT Available Available QSPI Available Available QSPI_DMA Available Available QSPI_MASTER Available Available QSPI_SLAVE Available Available REMC3 Available Available RTCA Available ...

Page 69: ... 2 3 and 2 4 significantly to clarify procedures regarding the sample software operations and support ENVPP pin and Bridge Board Ver 2 63 Add Added section 3 26 to support the sample software package Ver 2 0 Rev 2 10 06 06 2018 8 16 Change Changed to Sample Software installer and setup utility executables 65 Add Added Appendix Last Change Updated contact information Rev 3 00 02 26 2019 4 6 10 14 1...

Page 70: ...na Phone 86 21 5330 4888 FAX 86 21 5423 4677 Shenzhen Branch Room 804 805 8 Floor Tower 2 Ali Center No 3331 Keyuan South RD Shenzhen bay Nanshan District Shenzhen 518054 China Phone 86 10 3299 0588 FAX 86 10 3299 0560 Epson Taiwan Technology Trading Ltd 15F No 100 Songren Rd Sinyi Dist Taipei City 110 Taiwan Phone 886 2 8786 6688 Epson Singapore Pte Ltd 1 HarbourFront Place 03 02 HarbourFront Tow...

Search results

Summary of Contents for S1C31D01

Reviews:

Related manuals for S1C31D01

Brands by name

Popular brands

Epson S1C31D01, Software Manual

Search results

Summary of Contents for S1C31D01

Reviews:

Related manuals for S1C31D01

Brands by name

Popular brands