Epson RX8804CE, Applications Manual

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RX8804CE
Page - 11 ETM59E-05
8.2.3. Wakeup Timer Control Registers
Table 17 Wakeup Timer Control Registers
Address Function bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
Read Write
0B Timer Counter 0 128 64 32 16 8 4 2 1
 
0C Timer Counter 1 32768 16384 8192 4096 2048 1024 512 256
 
1B Timer set TSTP TRES
     
 
1C Timer0 128 64 32 16 8 4 2 1

1D Timer1
32768 16384 8192 4096 2048 1024 512 256

1E Timer2
8388608 4194304 2097152 1048576 524288 262144 131072 65536

1F Timer Counter 2
8388608 4194304 2097152 1048576 524288 262144 131072 65536
 
These registers are used to set the preset countdown value for the wakeup timer interrupt function.
The
TE, TF, TIE, and TSEL0 / 1 bits are also used to set the wakeup timer interrupt function.
When the value in the above wakeup timer control register just changes from 01h to 00h, the /INT pin goes
to low level and
“1” is set to the TF bit to report that a wakeup timer interrupt event has occurred.
Please refer to Wakeup timer Control function
8.2.4. Control Registers, Flag Registers
Table 18 Control Register, Flag Register
Address Function bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
0D
Control1 TEST WADA USEL TE FSEL1 FSEL0 TSEL1 TSEL0
(Default) (0) (0) (0) (0) (0) (0) (1) (0)
0E
Flag register   UF TF AF  VLF VDET
(Default) (0) (0) (0) (0) (0) (0) (1) (1)
0F
Control2 CSEL1 CSEL0 UIE TIE AIE   RESET
(Default) (0) (1) (0) (0) (0) (0) (0) (0)
•
The default value is loaded after powering up from 0 V, automatically.
•
TEST must be always cleared by a zero.
•
This register is used to specify the target for the alarm function or time update interrupt function and to
select or set operations such as wakeup timer operations.
1) TEST bit
This is the manufacturer's test bit. Its value should always be
“0”.
Be careful to avoid writing
“1” to this bit when writing to other bits.
Table 19 Test bit
TEST Data Description
Write
0 TEST bit is cleared to 0
1 Setting prohibited (manufacturer's test bit)
Read
0 TEST bit has been cleared to 0
1 TEST bit has been set to 1. Please reset to 0
2) VLF (Voltage Low Flag) bit
This flag bit indicates the history of clock operations due to low voltage.
Its value change from “0” to “1” indicates a possibility of data loss or time data error, and all the data of registers
should be initialized.
Once this flag bit's value is “1”, its value is retained until a “0” is written to it.
After
powering up from 0 V, make sure to set this bit's value to “1”.
Please refer to 8.10. Backup and Recovery.
Table 20 VLF bit
VLF Data Description
Write
0
The VLF bit is cleared to 0 to prepare for the next status detection
1
VLF data remains even it was 0 or 1. To retain the data, please write 1
Read
0
No supply voltage drops occurred
1
Low voltage has been detected, so data loss might have occurred, and time
information might be wrong
All registers should be initialized