23/04/2019
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Version 1.09
2.7
DIP Switches
The tables below show the functions of the configuration DIP switches. The options printed bold are
the default settings.
Switch
(CFG-A / S1200)
Off
On
1
Reserved (will be VCC_IO = 1.8V in
future versions)
VCC_IO is 2.5V or 3.3V
(depending on Switch 2)
2
VCC_IO is 2.5V
VCC_IO is 3.3V
3
USB from FPGA module routed to
USB 2.0 A connector (J501)
USB from FPGA module routed to
USB 3.0 B connector J500 (FX3
USB connection disabled)
4
Board powered from DC Power
Input (J1300)
Board powered from USB (J500) if
J1300 not connected
Table 2: DIP switch CFG-A settings
Switch
(CFG-B / S1204)
Off
On
1
Pull down on the BOOT_MODE
signal of the Mars module
(Mars
connector pin 190, SPI flash boot
mode on most modules)
Pull up on the BOOT_MODE signal
of the Mars module
(passive serial or SD-Card boot
mode depending on the module)
2
Mars connector pin 170 floating
Mars connector pin 170 tied to
GND (used as BOOT_MODE1 on
some modules)
3
Mars connector pin 168 floating
Mars connector pin 168 tied to
GND
4
FTDI USB UART routed to pins
34+36 of the Mars connector
FTDI USB UART routed to pins
153+155 of the Mars connector
(for use with SOC modules, only
use if the FX3 FIFO interface is not
used)
Table 3: DIP switch CFG-B settings
Warning
If DIP Switch S1200-4 is on (board powered from USB) then the board must not be
powered from J1301 at the same time. Otherwise the Mars PM3 gets severely damaged.