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Connections and Interfaces
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6.3
SSI Interface
6.3.1
Function Principle
If the clock is not interrupted for the time Tm-T/2 (output of further 25 periods), the shift register clocks once
again the same data value (error recognition in the evaluation). Some encoders contain a Power Failure Bit
(PFB). Attention: With the LIMAX02 the PFB is always “LOW”!
6.3.2
Data Protocol
Figure 28: Data Protocol SSI Interface
6.3.3
Pin Assignment
Table 5: Pin Assignment SSI open cabel ends
Open cable ends
Color
Function
White
0 V / GND
Brown
+ 24 VDC
Pink
Data -
Grey
Data +
Yellow
CLK -
Green
CLK +
Shield
PE
Table 6: Pin Assignment SSI Interface
9-pin. D-SUB Connector
NEWLIFT FST1 (D9M0)
NEWLIFT FST2 (D9M1)
Pin
Function
Function
1
DATA +
0V / GND
2
CLK -
CLK +
3
-
N.C.
4
24 VDC
DATA +
5
0V / GND
0V / GND
6
DATA -
+ 24 VDC
7
CLK +
CLK -
8
-
DATA -
Housing
PE
N.C.
T
23 22 21
20
19
18
17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
PFB = Power Failure Bit
T = length of clock signal
Tm = monostable multivibrator time > 10µs
24 Data bits/3 Bytes
PFB