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EKF PC5-LARGO User Manual Download Page 65

PC5-LARGO  •  CompactPCI

®

 PlusIO  •  5

th

 Generation Intel

®

 Core™-5xxx Processor

Manufacturer Mode Jumper (J-MFG)

The jumper J-MFG is used to bring the board into the manufacturer mode. This is necessary only on
board production time and should not used by customers. For normal operation the jumper should 
be removed. The pin header J-MFG is not stuffed on the PC5-LARGO by default.

J-MFG

Function

Jumper Removed 

1)

Normal operation

Jumper Installed

Entering Manufacturer Mode

1)

 This setting is the factory default

1

J-MFG

©  EKF                                                                                        -65-                                                                                      ekf.com

Summary of Contents for PC5-LARGO

Page 1: ...User Guide PC5 LARGO CompactPCI PlusIO CPU Card 5th Generation Intel Core Processor Broadwell Document No 8556 Edition 5 3rd July 2020...

Page 2: ...t Assembly 19 Front Panel Connectors 20 Front Panel Switches Indicators 20 On Board Connectors Sockets 21 Pin Headers 21 Jumpers 21 Microprocessor 22 Thermal Considerations 23 Main Memory 24 Graphics...

Page 3: ...8 GPIO Usage 59 GPIO Usage QM87 PCH 59 Configuration Jumpers 62 Configuration PCI Express Switch DS P 62 Loading UEFI BIOS Setup Defaults IEEE 1588 Pulse per Second J GP 64 Manufacturer Mode Jumper J...

Page 4: ...PC5 LARGO CompactPCI PlusIO 5th Generation Intel Core 5xxx Processor CompactPCI J1 88 CompactPCI J2 PlusIO 89 Mechanical Drawing 91 EKF 4 ekf com...

Page 5: ...ion Text 8556 File pc5_ug wpd jj 20 June 2017 2 Fixed a mixup regarding external power reset signal via J2 C17 jj 11 August 2017 2 1 Added Intel AMT support to table Feature Summary jj 6 November 2017...

Page 6: ...m s serial html Related Documents Mezzanine Modules and Side Cards C40 C48 Series Mezzanine Storage Modules www ekf com c ccpu c4x_mezz_ovw pdf C48 M2 Dual M 2 SATA SSD Mezzanine Storage Module www ek...

Page 7: ...I CompactPCI PlusIO CompactPCI Serial PICMG Windows Microsoft EKF ekf system EKF EKF does not claim this list to be complete Legal Disclaimer Liability Exclusion This manual has been edited as careful...

Page 8: ...e Rev 1 0 Digital Display Working Group www ddwg org Ethernet IEEE Std 802 3 2000 Edition standards ieee org Precision Time Protocol IEEE Std 1588 2008 July 24 2008 standards ieee org LPC Low Pin Coun...

Page 9: ...are available for additional front panel and or rear I O resulting in an 8HP front panel width assembly unit The PC5 LARGO can be equipped with up to 24GB DDR3L ECC RAM Up to 8GB memory down are provi...

Page 10: ...e as system slot controller for both backplane segments The PC5 LARGO is equipped with a set of local expansion interface connectors which can be optionally used to attach a mezzanine side board A var...

Page 11: ...sion option side card On board SATA x 4 6G mezzanine expansion option for mass storage modules or side cards On board DisplayPort 3rd video output mezzanine expansion option for side cards Side cards...

Page 12: ...ining Max Resolution 4096 x 2304 60Hz any DisplayPort 1920 x 1200 VGA 4k x 2k 24Hz supported for Blu ray playback Integrated audio Networking Up to 4 networking interfaces in total 2 x front RJ45 GbE...

Page 13: ...series Intel AES NI Front Panel I O 4HP 2 x Gigabit Ethernet RJ45 1 PCH I217LM Intel AMT support 2 I210IT 2 x DisplayPort from processor integrated HD graphics engine mDP style receptacles optional ca...

Page 14: ...ine side card options to be ordered separately PCL CAPELLA multi function side card PCS BALLET multi function side card SCS TRUMPET multi function side card C32 FIO 2 x COM RS 232 USB PS 2 12HP assemb...

Page 15: ...pport Packages Driver LynxOS on request On Time RTOS 32 on request OS 9 on request QNX 4 x 6 x on request Real Time Linux RT Patch on request RTX on request VxWorks 5 5 6 9 on request VxWorks 7 0 unde...

Page 16: ...ad Current A at 5V 0 25V 0 15V Maximum Performance LFM HFM Turbo 1 Windows 10 Idle LFM HFM Turbo 1 Maximum Performance LFM HFM Turbo 1 Windows 10 Idle LFM HFM Turbo 1 PC5 830D tbd tbd 2 52 tbd tbd tbd...

Page 17: ...GbE I210 IT 4 PCIe Gen3 1 PCIe Gen3 Mezzanine Side Card I O PCIe Gen2 Switch USB2 8608 6 LPC Audio SMB GPIO 4 2 4x1 1x4 2 4 SATA 6G 4 GbE 2 SATA RAID USB2 4 PCIe Gen2 PCIe Gen2 I210 IT PCIe to PCI Bri...

Page 18: ...Side Component Assembly HSE EXP PCIE J2 UHM P HSE P EXP P PCIE DP3 P DP3 2 x USB 3 0 J GP J RTC P USB VGA DP 2 DP 1 P DP1 P DP2 P VGA BATT1 BATT2 P FPH SODIMM P SODM J MFG J1 Dual GbE P ETH PC5 LARGO...

Page 19: ...5th Generation Intel Core 5xxx Processor R_BTN LED PGD LED GP LED HD LED GEB Reset BTN P XDP 1 P ISP 1 Bottom Side Component Assembly DS P 1 2 PC5 LARGO CompactPCI PlusIO EKF ekf com Bottom View Compo...

Page 20: ...al Serial Bus 3 0 type A receptacles VGA VGA analog video output connector Mini DisplayPort connectors available as alternate Front Panel Switches Indicators EB LED indicating Backplane Ethernet activ...

Page 21: ...DisplayPort on side board J1 J2 CompactPCI Bus 32 bit universal V I O 33MHz PlusIO P SODM 204 pin DDR3L ECC Memory Module SDRAM PC5L 12800 Socket ECC SODIMM P XDP CPU Debug Port 1 1 Connector populate...

Page 22: ...nning at core clock speeds up to 2 7GHz for quad core usage Due to Enhanced Intel SpeedStep and Intel Turbo Boost Technology each core can decrease or increase its nominal operating frequency The cloc...

Page 23: ...3 h or 2m s 400LFM around the CPU slot Be sure to thoroughly discuss your actual cooling needs with EKF Generally the faster the CPU speed the higher its power consumption For higher ambient temperatu...

Page 24: ...ypically development of 2x8GB of memory is recommended to run operating systems like Windows The memory controller supports symmetric and asymmetric memory organization The maximum memory performance...

Page 25: ...onnector standard type via the common 8HP front panel As an alternate the PC5 LARGO can be equipped with an ordinary HD D Sub 15 lead connector VGA style This connector is suitable for analog signals...

Page 26: ...speed and activity status A further bicoloured LED in front panel labelled EB displays the state of the backplane network ports Each device is connected by a single PCI Express lane to the PCH Their...

Page 27: ...Gbps EKF has tested successfully also 6G over the backplane with sample devices but cannot guarantee this data rate under any condition Other devices and other backplane brands types in use may cause...

Page 28: ...nother four PCI Express lanes are provided by the Intel CoreTM i7 processor to the J PCIE connector A small DIP switch DS P located on the backside of the board are used to configure different lane wi...

Page 29: ...nsion board interface connectors J EXP four to the high speed expansion connector J HSE and four ports are available across the backplane connector J2 The front panel USB connectors can source a minim...

Page 30: ...The SMBus signal lines on the P EXP utility expansion connector can be switched on off under software control PCH GPIO in order to isolate external components in case of an I2 C address conflict The...

Page 31: ...lications were the use of a battery is not permitted a SuperCap can be soldered instead of the battery SPI Flash The UEFI and iAMT firmware is stored in flash devices with Serial Peripheral Interface...

Page 32: ...rd to power state S5 In case of entering this state unlock and lock the front panel handle a 2nd time to reenter normal power state S0 again See also section PG Power Good LED to see how the PC5 LARGO...

Page 33: ...PC5 LARGO CompactPCI PlusIO 5th Generation Intel Core 5xxx Processor EKF ekf com 1 2 3 4 5 6 7 8 4s EKF 33 ekf com...

Page 34: ...the steps 2 10 50 and 255 seconds After alerting the WD and programming the time out value the related software e g application program must trigger the watchdog periodically For details on programmi...

Page 35: ...After Reset GREEN X X Board Healthy and in S0 State YELLOW BLINK X X Front panel handle is unlocked RED X X Hardware Failure Power Fault RED BLINK X X Software Failure PG Power Good LED The PC5 LARGO...

Page 36: ...blinking GP LED is an indication that the BIOS code couldn t start While the CPU card is controlled by the BIOS firmware the GP LED is used to signal board status information during POST Power On Self...

Page 37: ...ttached to the backplane via the CompactPCI PlusIO connector J2 a single bicoloured LED is provided in the front panel The states are decoded as follows 1_ETH 2_ETH LED EB no link no link OFF link no...

Page 38: ...to remove the system controller from a CompactPCI system However it is capable to recognize the hot swap of peripheral boards and to start software that is performing any necessary system reconfigura...

Page 39: ...ded with several stacking connectors for attachment of a mezzanine expansion module aka side board suitable for a variety of readily available mezzanine cards please refer to www ekf com c ccpu mezz_o...

Page 40: ...PC5 LARGO CompactPCI PlusIO 5th Generation Intel Core 5xxx Processor Sample Mezzanine Side Card 8HP Assembly Sample Low Profile Mezzanine Module 4HP Assembly EKF 40 ekf com...

Page 41: ...x Processor P EXP I F Type Controller LPC Low Pin Count PCH HD Audio PCH SMBus PCH buffered 2 x USB 2 0 PCH P HSE I F Type Controller SATA1 SATA2 SATA3 SATA4 PCH 4 x USB 2 0 PCH P PCIE I F Type Contro...

Page 42: ...PC5 LARGO CompactPCI PlusIO 5th Generation Intel Core 5xxx Processor PC5 LARGO w SCS TRUMPET 8HP Assembly EKF 42 ekf com...

Page 43: ...hybrid backplane both card styles can reside CompactPCI and CompactPCI Serial with the PC5 LARGO in the middle as controller for both backplane segments The PC5 LARGO can be used in any system with a...

Page 44: ...lane The J2 P2 pin assignment of a 64 bit CPCI backplane differs substantially from a CompactPCI PlusIO backplane which will result in a short circuit situation on several pins causing permanent damag...

Page 45: ...PC5 LARGO CompactPCI PlusIO 5th Generation Intel Core 5xxx Processor Small CompactPCI PlusIO Box CompactPCI PlusIO Rack EKF 45 ekf com...

Page 46: ...connect power or telecommunication links before you open the system or perform any procedures can result in personal injury or equipment damage Some parts of the system can continue to operate even th...

Page 47: ...move the AC power cord C Attach your antistatic wrist strap to a metallic part of the system C Remove the board packaging be sure to touch the board only at the front panel C Identify the related Comp...

Page 48: ...remove the AC power cord C Attach your antistatic wrist strap to a metallic part of the system C Identify the board be sure to touch the board only at the front panel C Unfasten both front panel screw...

Page 49: ...be fastened by built in screws C Cover any unused front panel mounted connector with a shielding cap C External communications cable assemblies must be shielded shield connected only at one end of th...

Page 50: ...y holder which makes it possible for the user to replace the coin cell Use a BR2032 cell as replacement part to ensure an extended temperature range Be careful when removing the old cell and inserting...

Page 51: ...0x8086 0x8C2D USB EHCI Controller 2 0 27 0 0x8086 0x8C20 Intel High Definition Audio Controller 0 28 0 0x8086 0x8C10 PCH PCI Express Port 1 0 28 3 0x8086 0x8C16 PCH PCI Express Port 4 0 28 4 0x8086 0x...

Page 52: ...PROM a supply voltage temperature controlling device and a set of board control and status registers Additional devices may be connected to the SMBus via the CompactPCI Serial backplane signals I2 C_S...

Page 53: ...nding supply voltages of the PC5 LARGO Input Source Resolution mV Register AIN1 Processor Core Voltage 9 8 0x28 AIN2 1 5V 9 8 0x29 VCCP1 1 35V DDR Voltage 14 1 0x21 VCCP2 D2 1 8V 14 1 0x25 2 5V D2 1 0...

Page 54: ...isters located on the SMBus at Device ID 0x5c on the following addresses 0xA0 CMD_CTRL0_WR Write to Control Register 0 Write Only 0xA1 CMD_CTRL0_RD Read from Control Register 0 Read Only 0xB0 CMD_STAT...

Page 55: ...5 FERP 0 The front panel handle switch generates a power event Default 1 The front panel handle switch generates a system reset 4 3 WDGT0 WDGT1 Maximum Watchdog retrigger time 0 0 2 sec 1 0 10 sec 0...

Page 56: ...ay be caused by a power failure of the V1 35S voltage regulator 4 RESERVED Always read as 0 3 PF105M 0 Normal operation 1 Last system reset may be caused by a power failure of the V1 05M voltage regul...

Page 57: ...ailure on the 12V voltage rail 3 PF5S 0 Normal operation 1 Last system reset may be caused by a power failure of the V5S voltage regulator 2 PF33M 0 Normal operation 1 Last system reset may be caused...

Page 58: ...GO CompactPCI PlusIO 5th Generation Intel Core 5xxx Processor Read PLD Revision Register Write Not allowed Read SMBus Address 0xC1 Bit Description CMD_PLDREV 7 0 PLDREV Read PLD Revison Number EKF 58...

Page 59: ...Ethernet Controller NC1 13 I V3 3A HM_INT Hardware Monitor LM87 Interrupt Line 14 I V3 3A USB_OC7 USB P EXP Port 1 or 2 Overcurrent Detect 15 O V3 3A N A Not connected on PC5 16 O V3 3S SE_SYS_WP Gen...

Page 60: ...Overcurrent Detect 41 O V3 3A ENABLE_NC3 Enable Ethernet Controller NC3 42 O V3 3A ENABLE_NC4 Enable Ethernet Controller NC4 43 I V3 3A USB_OC4 USB P HSE Port 1 Overcurrent Detect 44 I V3 3A PCIE_CLK_...

Page 61: ...61 62 O V3 3A N A Not connected on PC5 63 O V3 3A SLP_S5 Multiplexed with chipset internal function 64 O V3 3S CLKOUT_FLEX1 14 318MHz Clock Source 65 67 O V3 3A N A Not connected on PC5 68 71 I V3 3S...

Page 62: ...ration are honoured by the board not before a system reset was performed DS P PCIe Link Width 1 2 PCIe Switch Upstream P PCIE OFF OFF 4 Lanes 5GT s 4 Links x 1 Lane 5GT s ON OFF 4 Lanes 5GT s 1 Link x...

Page 63: ...side boards mounted to the PC5 LARGO Side Board DS P PCIe Link Width 1 2 P PCIE None OFF OFF 4 Links x 1 Lane 5GT s CCI RAP OFF OFF 4 Links x 1 Lane 5GT s CCK MARIMBA ON OFF 1 Link x 4 Lanes 5GT s CCL...

Page 64: ...form a system reset As long as the jumper is stuffed the BIOS will use the default configuration values after any system reset To get normal operation again the jumper has to be removed There is also...

Page 65: ...turer mode This is necessary only on board production time and should not used by customers For normal operation the jumper should be removed The pin header J MFG is not stuffed on the PC5 LARGO by de...

Page 66: ...BIOS Setup to EKF Factory Defaults nor resets the time and date register values of the RTC Real Time Clock To reset the RTC core the board must be removed from the system rack Short circuit the pins...

Page 67: ...internal connectors for powering devices external to the computer chassis A fault in the load presented by the external devices could cause damage to the board the interconnecting cable and the exter...

Page 68: ...l mDP G ETH HD RST USB 3 0 PG GP mDP 1 2 G ETH HD RST USB 3 0 PG GP mDP 1 2 C F A S T USB 1 4 GbE M i c r o S A T A PCL CAPELLA SATA 2 2 1 4 GbE 2 2 EB EB 2 Sample Front Panel Options 8HP EKF draft do...

Page 69: ...5xxx Processor Sample Front Panel Options 12HP C O M C C O M D K B M S U S B C32 FIO PCS BALLET RS 232 EKF draft do not scale ekf com PC5 LARGO Dual mDP A U D I O OUT IN C O M A USB 3 0 G ETH HD RST...

Page 70: ...0 state only Most DisplayPort monitors come with the standard DP connector hence requiring a mDP to DP cable assembly for use with the PC5 LARGO For attachment of either a classic style analog RGB mon...

Page 71: ...tching device For rugged applications with need for a connector locking mechanism EKF offers two methods of fixing 1 The front panel is provided with a threaded hole for fixing a removable H shape ret...

Page 72: ...layPort video output is available when combining the PC5 LARGO with the mezzanine side card SCS TRUMPET or PCS BALLET The standard DP connector provided on these side cards is provided with latches wh...

Page 73: ...PC5 LARGO CompactPCI PlusIO 5th Generation Intel Core 5xxx Processor PC5 LARGO w PCS BALLET Side Card 2 5 Inch SSD 8HP PC5 LARGO w PCS BALLET C32 FIO C20 SATA 12HP EKF 73 ekf com...

Page 74: ...nnector The connector VGA replaces the two Mini DisplayPort receptacles and the digital video interface therefore is not available concurrently with this option P VGA Option 1 RED 2 GREEN 3 BLUE 4 NC...

Page 75: ...acle USB 3 0 dual type A receptacle stacked 18 position 1 VBUS 5V 1 5A max 1 2 USB D 3 USB D 4 GND 5 SS RX 6 SS RX 7 GND 8 SS TX 9 SS TX 1 5V via 1 5A current limited electronic power switch Power rai...

Page 76: ...8 NC1_MDX3 Port 2 IEEE 1588 1 NC2_MDX0 2 NC2_MDX0 3 NC2_MDX1 4 NC2_MDX2 5 NC2_MDX2 6 NC2_MDX1 7 NC2_MDX3 8 NC2_MDX3 The lower green LED indicates LINK established when continuously on and data transf...

Page 77: ...PC5 LARGO CompactPCI PlusIO 5th Generation Intel Core 5xxx Processor Mezzanine Side Card Connector Suite Picture Similar Mezzanine Connectors EKF 77 ekf com...

Page 78: ...PC5 LARGO CompactPCI PlusIO 5th Generation Intel Core 5xxx Processor PCIE EXP HSE DP EKF 78 ekf com...

Page 79: ...PC5 LARGO CompactPCI PlusIO 5th Generation Intel Core 5xxx Processor PC5 LARGO w Low Profile Mezzanine Modul HSE Connector Based EKF 79 ekf com...

Page 80: ...5V 1 HDA_SDOUT 33 34 HDA_SDIN0 HDA_RST CL_RST 3 35 36 HDA_SYNC HDA_CLK CL_CLK 3 37 38 HDA_SDIN1 CL_DATA 3 SPEAKER 39 40 12V 4 1 Power rail switched on in state S0 only 2 Connected to SMBus via buffere...

Page 81: ...HSE4_N GND a19 b19 GND USB_HSE_OC1 a20 b20 USB_HSE_OC34 USB_HSE_OC2 a21 b21 USB_HSE_OC34 3 3VS 1 a22 b22 5VS 1 3 3VS 1 a23 b23 5VS 1 3 3VA 2 a24 b24 5VA 2 12V 3 a25 b25 12V 3 1 Power rail switched on...

Page 82: ...5 LARGO CompactPCI PlusIO 5th Generation Intel Core 5xxx Processor C48 M2 Mezzanine Storage Module Based on the Connector HSE C47 MSATA Mezzanine Storage Module Based on the Connector HSE EKF 82 ekf c...

Page 83: ...8 GND PE_3TP 29 30 PE_3RP PE_3TN 31 32 PE_3RN GND 33 34 GND PE_4TP 35 36 PE_4RP PE_4TN 37 38 PE_4RN GND 39 40 GND 1 Power rail switched on in state S0 only WARNING The 3 3V and 5V power pins are not p...

Page 84: ...Socket Connector 290 1 020 080 EKF ekf com DisplayPort Expansion Header P DP3 P DP3 GND 1 2 GND DP_LANE0 3 4 DP_LANE3 DP_LANE0 5 6 DP_LANE3 GND 7 8 GND DP_LANE1 9 10 DP_AUX DP_LANE1 11 12 DP_AUX GND...

Page 85: ...which is integrated into the PC5 LARGO front panel handle ejector lever The switch performs a power button event e g system shutdown by short circuiting the pins 1 and 3 of P FPH when activated hold u...

Page 86: ...ded with a powerful PLD in System Programmable Logic Device which replaces legacy glue logic The programming header P ISP is not stuffed in use for manufacturing only Its footprint is situated at the...

Page 87: ...TP XDP SFF 26 is required in addition to convert the 26 pin XDP SFF 26 Pin connector to the standard 60 pin XDP The header P XDP would be mounted on the PCB bottom side but is not stuffed by default P...

Page 88: ...6 GND V I O AD25 AD24 7 AD30 AD29 AD28 GND AD27 6 REQ 1 GND 3 3V CLK AD31 5 BRSVP1A5 4 BRSVP1B5 4 RST GND GNT 4 IPMB PWR GND V I O INTP 1 INTS 1 3 INTA 1 INTB 1 INTC 1 5V INTD 1 2 TCK 4 5V TMS 4 TDO 4...

Page 89: ...uest altered content for the Marvell 88SE9230 attached SPI Flash EKF recommends that customers validate their particular SATA 6G application thoroughly since SATA channel data errors can decrease the...

Page 90: ...4_SATA_RX AD43 10 3_PE_RX00 AD49 4_PE_TX00 AD48 4_USB2 AD47 4_SATA_TX GND 3_SATA_RX AD46 9 3_PE_RX00 AD52 3_PE_TX00 GND 3_USB2 V I O 3_SATA_TX AD51 3_SATA_RX AD50 8 2_PE_RX00 AD56 3_PE_TX00 AD55 3_US...

Page 91: ...93 5mm DP 48 5 5 5mm 79 3 5 5mm 89 0 7 0mm 132 07 5 5mm 100 0mm 3 57 5 5mm 19 3 5 5mm 160 0mm 160 0 100 0mm EKF ekf com Mezzanine Connector Alignment P HSE P DP3 P EXP P PCIE PC5 LARGO CompactPCI Plus...

Page 92: ...al Computers Made in Germany boards systems solutions Beyond All Limits EKF High Performance Embedded EKF Elektronik GmbH Philipp Reis Str 4 Haus 1 Lilienthalstr 2 Haus 2 59065 HAMM Germany Phone 49 0...

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