
51
Using BIOS
f
Chipset Configuration
Scroll to this item to view the following screen:
Memory Multiplier (13.33)
This item shows the value of Memory Multiplier.
CAS# Latency (tCL) (9)
This item determines the operation of DDR SDRAM memory CAS (column address
strobe). It is recommanded that you leave this item at the default value. The 2T
setting requires faster memory that specifically supports this mode.
RAS# to CAS# Delay (tRCD) (9)
This item specifies the RAS# to CAS# delay to Rd/Wr command to the same bank.
RAS# Active Time (tRAS) (24)
This item specifies the RAS# active time.
Row Precharge Time (tRP) (9)
This item specifies Row precharge to Active or Auto-Refresh of the same bank.
ROW Refresh Cycle Time (tRFC) (107)
This item specifies the Row refresh cycle time.
Main
Advanced
Chipset
M.I.B III
Boot Security Exit
+/- : Change Opt.
Enter/Dbl Click : Select
lk
mn
: Select Screen
/Click: Select Item
F1: General Help
F2: Previous Values
Disabled/Enabled GT
OverClocking
F3: Optimized Defaults
F4: Save & Exit
ESC/Right Click: Exit
Memory Multiplier Configuration
Memory Multiplier 13.33
Memory Timing Configuration
CAS# Latency (tCL) 9
Row Precharge Time (tRP) 9
RAS# to CAS# Delay (tRCD) 9
RAS# Active Time (tRAS) 24
Write Recovery Time (tWR) 10
Row Refresh Cycle Time (tRFC) 107
Write to Read Delay (tWTR) 5
Active to Active Delay (tRRD) 4
Read CAS# Precharge (tRTP) 5
Four Active Window Delay (tFAW) 20
Intel Graphics Configuration
GT OverClocking Disabled
Write Recovery Time (tWR) (10)
This item specifies the write to read delay.
Write to Read Delay (tWTR) (5)
This item specifies the write to read delay.