E.F. Johnson 242-2008-332, Manual

Page: 43 / 51

CIRCUIT DESCRIPTION
6-7
September 1994
Part No. 001-2008-300
Figure 6-4 EXCITER BLOCK DIAGRAM
BUFFER
PHASE DETECTOR
DATA
CLK
BUFFER
VCO
BUFFER AMP
SYN CS EX
SYN LK EX
U403 Q406/Q407
U404B
BUFFER
Q410/Q411 Q412 Q413
AMP
Q405
Q403/Q404
BUFFER
Y401
TCXO
U404A
U402A U402B EX MOD
LPTT
SWITCH
TO PA A007
AMP
AMP
U407B V REF EX
Data is loaded into U403 serially on the Data
input port U403, pin 19. Data is clocked into the shift
registers a bit at a time by a low to high transition on
the Clock input port U403, pin 18. The Clock pulses
come from the TPI via the IAC to J401, pin 19.
As previously stated, the counter divide numbers
are chosen so that when the VCO is operating on the
correct frequency, the VCO-derived input to the phase
detector (f
V
) is the same frequency as the TCXO-
derived input (f
R
).
The f
R
input is produced by dividing the 17.5
MHz TCXO frequency by 1187. This produces a ref-
erence frequency (f
R
) of 12.5 kHz. Since the VCO is
on frequency and no multiplication is used, the fre-
quencies are changed in 12.5 kHz steps. The refer-
ence frequency is 12.5 kHz for all frequencies selected
by this exciter.
The f
V
input is produced by dividing the VCO
frequency using the prescaler and N counter in U403.
The prescaler divides by 64 or 65. The divide number
of the prescaler is controlled by the N and A counters
in U403. The N and A counters function as follows:
One input signal is the reference frequency (f
R
).
This frequency is the 17.5 MHz TCXO frequency
divided by the reference counter to be half the chan-
nel spacing or 12.5 kHz.
The synthesizer contains the R (reference), N,
and A counters, phase and lock detectors and counter
programming circuitry.
The other input signal (f
V
) is from the VCO fre-
quency divided by the "N" and "A" counters in U403,
programmed through the synthesizer data line on J401,
pin 20. Each channel is programmed by a divide num-
ber so that the phase detector input is identical to the
reference frequency (f
R
) when the VCO is locked on
the correct frequency.
Frequencies are selected by programming the
three counters in U403 to divide by assigned num-
bers. The programming of these counters is per-
formed by circuitry in the TPI, which is buffered and
latched through the Interface Alarm Card (IAC) and
fed in to the synthesizer on J401, pin 20 to Data input
port U403, pin 19.