Dynamic Engineering PMC-4U-CACI User Manual Download Page 1

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DYNAMIC ENGINEERING

435 Park Dr., Ben Lomond, Calif. 95005

831-336-8891

Fax

831-336-3840

[email protected]

www.dyneng.com

Est. 1988

User Manual

PMC-4U-CACI

Quad UART - Dual Synchronous

Serial Data Interface

PMC Module

Revision OR

Corresponding Hardware: Revision 01

Summary of Contents for PMC-4U-CACI

Page 1: ...k Dr Ben Lomond Calif 95005 831 336 8891 Fax 831 336 3840 sales dyneng com www dyneng com Est 1988 User Manual PMC 4U CACI Quad UART Dual Synchronous Serial Data Interface PMC Module Revision OR Corresponding Hardware Revision 01 ...

Page 2: ... any time and without notice Furthermore Dynamic Engineering assumes no liability arising out of the application or use of the device described herein The electronic equipment described herein generates uses and can radiate radio frequency energy Operation of this equipment in a residential area is likely to cause radio interference in which case the user at his own expense will be required to tak...

Page 3: ...CC_IVEC 17 PMC4U_DIR_TERM 17 PMC4U_SW_IN 18 PMC4U_SCC_A_CNTL 19 PMC4U_SCC_A_DATA 19 PMC4U_SCC_B_CNTL 19 PMC4U_SCC_B_DATA 19 PMC4U_UART_A 20 PMC4U_UART_B 20 PMC4U_UART_C 20 PMC4U_UART_D 20 PMC4U_IRUPT PMC4U_IRUPT_CLR 21 Interrupts 22 Loop back 23 PMC PCI PN1 INTERFACE PIN ASSIGNMENT 24 PMC PCI PN2 INTERFACE PIN ASSIGNMENT 25 PMC 4U FRONT PANEL IO PIN ASSIGNMENT 26 PMC PN4 USER INTERFACE PIN ASSIGNM...

Page 4: ...ring Services P a g e 4 Interfacing 28 CONSTRUCTION AND RELIABILITY 29 THERMAL CONSIDERATIONS 29 WARRANTY AND REPAIR 30 SERVICE POLICY 31 OUT OF WARRANTY REPAIRS 31 FOR SERVICE CONTACT 31 SPECIFICATIONS 32 ORDER INFORMATION 33 SCHEMATICS 33 ...

Page 5: ... CONTROL REGISTER BIT MAP 13 FIGURE 5 PMC 4U TX CONTROL REGISTER BIT MAP 16 FIGURE 6 PMC 4U INTERRUPT MASK REGISTER BIT MAP 16 FIGURE 7 PMC 4U DIRECTION TERMINATION CONTROL BIT MAP 17 FIGURE 8 PMC 4U SWITCH READ BIT MAP 18 FIGURE 9 PMC 4U INTERRUPT STATUS CLEAR 21 FIGURE 10 PMC 4U PN1 INTERFACE 24 FIGURE 11 PMC 4U PN2 INTERFACE 25 FIGURE 12 PMC 4U FRONT PANEL INTERFACE 26 FIGURE 13 PMC 4U PN4 INTE...

Page 6: ...in active low output driver for one synchronous channel and an RS 422 driver and receiver for the other synchronous channel Other variations are possible Different oscillators can be installed or other modifications can be made to accommodate your particular requirements That variation will then be offered as a standard special order product Please see our web page for current products offered and...

Page 7: ...are selectively terminated with switched 150Ω terminations All IO lines have series 33Ω resistors for circuit protection The UART SCC and IO lines all interface through the Xilinx FPGA to allow maximum flexibility of connections All configuration registers internal to the Xilinx support read and write operations for software convenience All addresses are long word aligned including the UART and SC...

Page 8: ...terrupt status is still available in a status register even when the master interrupt enable is off This facilitates polled operation of interrupt conditions The individual interrupt conditions are specified in the internal registers of the UART and SCC Please see the XR16C854 and Z85C30 documentation for more information on interrupt conditions and configuration ...

Page 9: ...ed by a logic block within the Xilinx The PMC 4U design requires one wait state for read or write cycles to addresses other than the SCC and UART which require from three for simple read or write operations to nine for the SCC interrupt acknowledge vector read cycle The wait states refer to the number of clocks after the PCI core decode before the terminate with data state is reached Two additiona...

Page 10: ...NTERNAL ADDRESS MAP Each UART channel has a number of registers associated with it These register offsets and their general functions are given in figure 3 For details of the bits and functions of each register consult the documentation for the XR16C854 The SCC also has a number of internal registers that are accessed in a two step process First the register number is written to the control addres...

Page 11: ...RT baud rate register defines enabled when LCNTL bit 7 1 PMC4U_UART_DLL 0X00 UART read write LSB divisor PMC4U_UART_DLM 0X04 UART read write MSB divisor UART enhanced register offsets enabled when LCNTL 0xbf PMC4U_UART_FTC 0X00 UART FIFO read count write trigger level PMC4U_UART_FEAT 0X04 UART write feature control PMC4U_UART_ENF 0X08 UART read write enhanced features PMC4U_UART_XON1 0X10 UART rea...

Page 12: ...h is used to identify the resident hardware The PMC 4U VendorId 0x10EE The CardId 0x0007 Current revision 0x00 The interrupt service routine should be loaded the interrupt mask set and the desired interrupt conditions set up in the UART and SCC Each of the four UART channels and the SCC has a separate bit in the interrupt and interrupt mask registers When an interrupt occurs this event is latched ...

Page 13: ...re active high and are reset on power up or reset command Test mode select is used to enable different drivers and receivers to allow thorough testing of the IO circuitry A value of 00 indicates normal operational mode In this mode the connections are as follows see figure 12 for pin out information Signal Function Driver Receiver UART Tx A IO_8 RS422 OUT_0 RS423 UART Rx A IO_0 RS422 UART Tx B IO_...

Page 14: ...e its connection remains the same Signal Function Driver Receiver UART Rx A IO_1 RS422 UART Rx B IO_3 RS422 UART Rx C IO_5 RS422 UART Rx D IO_7 RS422 SCC RTS A AUX_OUT_1 open drain SCC Tx B IO_14 RS422 SCC Rx B IO_12 RS422 When test mode select is 11 the following changes are made Signal Function Driver Receiver UART Rx A IN_0 RS232 UART Rx B IN_1 RS232 UART Rx C IN_2 RS232 UART Rx D IN_3 RS232 Wh...

Page 15: ...terrupting the host Force interrupt is used for test and software development purposes to create an interrupt request 1 assert interrupt request 0 normal operation Useful to stimulate interrupt acknowledge routines for development SCC reset causes a hardware reset of the SCC In order to accomplish this set this bit high and then low All registers and modes in the SCC will revert to the reset state...

Page 16: ...errupt will not be asserted on the PCI bus This bit can be used to operate the card in polled mode without interrupting the host PMC4U_MSK 0X08 PMC 4U Interrupt Mask Register Port read write INTERRUPT MASK DATA BIT DESCRIPTION 31 5 Spare 4 SCC Interrupt Enable 3 UART D Interrupt Enable 2 UART C Interrupt Enable 1 UART B Interrupt Enable 0 UART A Interrupt Enable FIGURE 6 PMC 4U INTERRUPT MASK REGI...

Page 17: ...upt PMC4U_DIR_TERM 0X10 PMC 4U Direction and Termination Port read write CONTROL DIR_TERM REGISTER DATA BIT DESCRIPTION 31 20 spare 19 16 TERMination 3 0 1 terminated 15 3 spare 2 0 DIRection 2 0 0 read 1 drive FIGURE 7 PMC 4U DIRECTION TERMINATION CONTROL BIT MAP The direction and termination for each of the 16 differential pairs is controlled through this port The bits default to 0 which corresp...

Page 18: ...1 IO_8 11 TERM2 IO_12 13 TERM3 IO_14 15 PMC4U_SW_IN 0X14 PMC 4U User Switch Port read only USER CONTROL SWITCH REGISTER DATA BIT DESCRIPTION 5 UB5 4 UB4 3 UB3 2 UB2 1 UB1 0 UB0 FIGURE 8 PMC 4U SWITCH READ BIT MAP The Switch Read Port has the user bits The user bits are connected to 6 switch positions The switches allow custom configurations to be defined by the user and for the software to know ho...

Page 19: ...A data buffers A write to this address loads a byte into the channel A transmit buffer a read removes a byte from the receive buffer PMC4U_SCC_B_CNTL 0X20 PMC 4U SCC Channel B Control Register read write This address is used to access all of the channel B registers In order to access a register other than this base register the register number is first written to this address A subsequent read or ...

Page 20: ...f these registers and their functions For more details on the access and functions of these registers see the XR16C854 documentation PMC4U_UART_C 0X80 PMC 4U UART C Base Address This is the base address for the eight register addresses associated with UART C Figure 3 gives an overview of these registers and their functions For more details on the access and functions of these registers see the XR1...

Page 21: ...ATUS DATA BIT DESCRIPTION 4 SCC interrupt 3 UART D interrupt 2 UART C interrupt 1 UART B interrupt 0 UART A interrupt FIGURE 9 PMC 4U INTERRUPT STATUS CLEAR The bits in this register indicate that an interrupt has been received from the corresponding device These bits are latched and once set will remain set until a one is written to the bit to be cleared ...

Page 22: ... individual enables for the four UART channels and the SCC are controlled by the PMC4U_MSK register In addition there are registers in the UART and SCC that must be configured for the particular conditions that are desired to generate an interrupt request An interrupt that is received from one of the UART channels or the SCC will be latched into the PMC4U_IRUPT register This interrupt will only af...

Page 23: ...INPUT2 U_TxA PIN 11 PIN 2 PIN 3 U_TxA PIN 45 PIN 36 PIN 37 U_TxB PIN 12 PIN 4 PIN 5 U_TxB PIN 46 PIN 38 PIN 39 U_TxC PIN 13 PIN 6 PIN 7 U_TxC PIN 47 PIN 40 PIN 41 U_TxD PIN 14 PIN 8 PIN 9 U_TxD PIN 48 PIN 42 PIN 43 U_TxA PIN 54 PIN 20 U_TxB PIN 55 PIN 21 U_TxC1 PIN 56 PIN 22 U_TxC2 PIN 60 PIN 24 PIN 25 U_TxD1 PIN 57 PIN 23 U_TxD2 PIN 61 PIN 26 PIN 27 S_TxA PIN 58 PIN 29 S_TCA PIN 59 PIN 30 S_TxB1 ...

Page 24: ...igned by the specification and not needed by this design 12V 1 2 GND INTA 3 4 5 6 BUSMODE1 5V 7 8 9 10 GND 11 12 CLK GND 13 14 GND 15 16 5V 17 18 AD31 19 20 AD28 AD27 21 22 AD25 GND 23 24 GND C BE3 25 26 AD22 AD21 27 28 AD19 5V 29 30 AD17 31 32 FRAME GND 33 34 GND IRDY 35 36 DEVSEL 5V 37 38 GND LOCK 39 40 41 42 PAR GND 43 44 AD15 45 46 AD12 AD11 47 48 AD9 5V 49 50 GND C BE0 51 52 AD6 AD5 53 54 AD4...

Page 25: ...used pins may be assigned by the specification and not needed by this design 12V 1 2 3 4 GND 5 6 GND 7 8 9 10 11 12 RST BUSMODE3 13 14 BUSMODE4 15 16 GND 17 18 AD30 AD29 19 20 GND AD26 21 22 AD24 23 24 IDSEL AD23 25 26 AD20 27 28 AD18 29 30 AD16 C BE2 31 32 GND 33 34 TRDY 35 36 GND STOP 37 38 PERR GND 39 40 SERR 41 42 C BE1 GND 43 44 AD14 AD13 45 46 GND AD10 47 48 AD8 49 50 AD7 51 52 53 54 GND 55 ...

Page 26: ... 7 41 IO_6 UART Rx D IO_6 UART Rx D 8 42 IO_7 IO_7 9 43 GND GND 10 44 IO_8 UART Tx A IO_8 UART Tx A 11 45 IO_9 UART Tx B IO_9 UART Tx B 12 46 IO_10 UART Tx C IO_10 UART Tx C 13 47 IO_11 UART Tx D IO_11 UART Tx D 14 48 IO_12 IO_12 15 49 IO_13 SCC Rx B IO_13 SCC Rx B 16 50 IO_14 IO_14 17 51 IO_15 SCC Tx B IO_15 SCC Tx B 18 52 GND GND 19 53 IN_0 OUT_0 UART Tx A 20 54 IN_1 OUT_1 UART Tx B 21 55 IN_2 O...

Page 27: ...B 15 16 IO_14 IO_15 SCC Tx B 17 18 GND IN_0 19 20 IN_1 IN_2 21 22 IN_3 IN_4 23 24 IN_5 IN_6 25 26 IN_7 GND 27 28 AUX_IN_0 SCC Rx A AUX_IN_1 SCC Rx Clk 29 30 GND 3 3 V REF 31 32 6 5 V REF 6 5 V REF 33 34 GND IO_0 UART Rx A 35 36 IO_1 IO_2 UART Rx B 37 38 IO_3 IO_4 UART Rx C 39 40 IO_5 IO_6 UART Rx D 41 42 IO_7 GND 43 44 IO_8 UART Tx A IO_9 UART Tx B 45 46 IO_10 UART Tx C IO_11 UART Tx D 47 48 IO_12...

Page 28: ...ltage to the PMC 4U when it is not powered can damage it as well as the rest of the host system This problem may be avoided by turning all power supplies on and off at the same time Alternatively the use of OPTO 22 isolation panels is recommended Keep cables short Flat cables even with alternate ground lines are not suitable for long distances PMC 4U does not contain special input protection The c...

Page 29: ...r screws attached to the 2 stand offs and 2 locations on the front panel The four screws provide significant protection against shock vibration and incomplete insertion The PMC Module provides a low temperature coefficient of 2 17 W oC for uniform heat This is based upon the temperature coefficient of the base FR4 material of 0 31 W m oC and taking into account the thickness and area of the PMC Th...

Page 30: ...repaid to Dynamic Engineering All replaced products become the sole property of Dynamic Engineering Dynamic Engineering s warranty of and liability for defective products is limited to that set forth herein Dynamic Engineering disclaims and excludes all other product warranties and product liability expressed or implied including but not limited to any implied warranties of merchandisability or fi...

Page 31: ...nsible for damages due to improper packaging of returned items For service on Dynamic Engineering Products not purchased directly from Dynamic Engineering contact your reseller Products returned to Dynamic Engineering for repair by other than the original customer will be treated as out of warranty Out of Warranty Repairs Out of warranty repairs will be billed on a material and labor basis The cur...

Page 32: ...ters Status Ports UART and SCC Interface Initialization Hardware Reset forces all registers to 0 resets UART and SCC Access Modes LW boundary Space see memory map Wait States 1 for all addresses except UART and SCC accesses Interrupt Each UART channel has its own interrupt bit The SCC has one interrupt bit for both channels The interrupts generated by these devices depend on the setup specified in...

Page 33: ...tic 2 PMC 4U Reference test software Data sheet reprints are available from the manufacturer s web site reference software Note The Engineering Kit is strongly recommended for first time PMC 4U buys Schematics Schematics are provided as part of the engineering kit for customer reference only This information was current at the time the printed circuit board was last revised This revision letter is...

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