Bit Ports - J4
As mentioned previously, these are "dynamic" not static ports. With referrence to sheet 2 of the schematic
diagram, the 8 I/O lines are actually driven by the data bus (BAD0 - 7). The ports are formed by decoding a
256 byte memory block and using the resulting output as an active low strobe, similar to the chip enable
signals for the EPROM and RAM chips. These 4 bit ports are mapped in external data memory at the
following address locations:
Bit port 1
FC00h
Bit port 2
FD00h
Bit port 3
FE00h
Bit port 4
FF00h
Although each port is mapped into a 256 byte block, it is only one address "wide". Therefore bit port 1 can
be accessed at address FC00h, FC01h, FC02h ... etc right through to FCFFh. These ports are both input and
output ports, depending on the instruction used to access them.
These ports are pin for pin compatible to the CN1 port on the Z80 based "Southern Cross" computer, also
available from DIY Electronics. It is provided on the Southern Cross II to take advantage of a number of add-
on boards already available for the "Southern Cross" computer.
The bit ports are brought out to a 16-pin header labelled J4.
J4 pin
Signal
J4 pin
Signal
1
+5V
2
/RESET
3
/BIT PORT 1
4
/BIT PORT 2
5
/BIT PORT 3
6
/BIT PORT 4
7
GND
8
GND
9
BAD4
10
BAD3
11
BAD5
12
BAD2
13
BAD6
14
BAD1
15
BAD7
16
BAD0
I/O Expansion Interface - J3
A maximum of 256 bytes of I/O expansion is available via connector J3. This interface allows for further
devices to be connected to the microcontroller. The interface is mapped in external data memory beginning at
address location F800h.
J3 pin
Signal
J3 pin
Signal
1
A0
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
AD0
10
AD1
11
AD2
12
AD3
13
AD4
14
AD5
15
AD6
16
AD7
17
/RD
18
/WR
19
RESET
20
ALE
21
/IOEXP
22
23
+5V
24
+5V
25
GND
26
GND
Signals preceeded by " / " are active low, all other signals are active high.
