Parallel I/O Ports
A number of parallel I/O ports are provided. Some are "static" in operation, meaning that any data written to
the port is latched. The other ports are "dynamic" in nature. These ports do not latch data written to them.
Output data is only valid while the port is being addressed. These ports are referred to as "bit ports".
8031 I/O ports - J1
The 8051 family of microcontrollers have four inbuilt 8-bit parallel ports, labelled P0-3. Two of these ports,
P0 and P2, are used as address/data busses when external program and data memory access is required. This
is the mode in which the Southern Cross II operates. Port bits P3.6 and P3.7 are used as /RD and /WR signals
and therefore are not available for use as I/O lines. This leaves 13 I/O lines available for use, all of port 1 and
bits 0-5 of port 3. Note that port bits P3.0 - P3.5 all have secondary functions eg. P3.0 and P3.1 are the Rx
and Tx lines for the 8031 serial port.
These 13 I/O lines are brought out to a 16-pin header labelled J1.
J1 pin
Signal
J1 pin
Signal
1
P1.0
2
P1.1
3
P1.2
4
P1.3
5
P1.4
6
P1.5
7
P1.6
8
P1.7
9
P3.0 / RxD
10
P3.1 / TxD
11
P3.2 / INT0
12
P3.3 / INT1
13
P3.4 / T0
14
P3.5 / T1
15
GND
16
GND
Port bits P1.3, P1.4 ans P1.5 also have a secondary function. They are connected via switch SW2 to the
memory decoder GAL, IC9, and used by the 8052-BASIC chips as EPROM programming control pins. These
pins are only needed by BASIC-52 when programs are to be saved into EPROM. Refer to the section on
"BASIC-52 Programming" for further details.
8255 I/O Ports - J2
Three 8-bit parallel ports are implemented using the 8255 Programmable Peripheral Interface (PPI) chip
(IC6). This chip is mapped in external data memory at address F400h. These 24 I/O lines are brought out to a
26-pin header labelled J2.
J2 pin
Signal
J2 pin
Signal
1
PA0
2
PA1
3
PA2
4
PA3
5
PA4
6
PA5
7
PA6
8
PA7
9
PB0
10
PB1
11
PB2
12
PB3
13
PB4
14
PB5
15
PB6
16
PB7
17
PC0
18
PC1
19
PC2
20
PC3
21
PC4
22
PC5
23
PC6
24
PC7
25
GND
26
GND
