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DEWE-ORION-0824-20x
Sample rate 102.4 kS/s to 200 kS/s
Input frequency response
Input frequency response near the cutoff
0
-1
-2
-3
-4
-5
-6
-7
-8
-9
-10
0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
-110
-120
0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
Amplitude (dB)
Frequency/sample rate
Amplitude (dB)
Frequency/sample rate
The ADC samples at 64, 128 or 256 times the data rate (depending on the adjusted sample rate). Frequency
components above one half of the oversampling rate (> 32, 64 or 128) can alias. Most of this frequency
range is rejected by the digital filter. The filter can not reject components that lie close (±Nyquist bandwidth)
to integer multiples of the oversampling rate because it can not differentiate these components from
components between 0 Hz and the Nyquist frequency. That means, if the sample rate is 10 kS/s and a signal
component is between 2.555 and 2.565 MHz (256 x 10 kHz ±Nyquist bandwidth), this signal will be aliased
into the passband region and is not rejected by the digital filter. The analog filter removes these components
before they get to the digital filter and the sampler.
The frequency response of the analog filter is fixed. The filter is optimized to produce high-frequency alias
rejection and to have a flat in-band frequency response. It is a second order filter with a slow roll-off that
rejects aliases at lower sample rates not so good. But the filter has very good alias rejection at higher sample
rates.
If aliasing is caused by a clipped or overranged waveform, (exceeding the voltage range of the ADC) it can
not be rejected with any filter. The ADC assumes the closest value to the actual value of the signal in its
digital range when the signal is clipping. The result of clipping is also a sudden change in the signal slope
and results in corrupt digital data with high-frequency energy. This energy is spread over the complete
frequency spectrum and is aliased back into the baseband. Do not allow the signal to exceed the input range
to avoid this.
3.1.5 Sample clock selection
Due to the nature of delta sigma converters they have to overclock the ADC to reach the high accuracy
specification. The overclocking rate varies with the sample rate:
256 for 1kS/s <= 51.2 kS/s
128 for 1kS/s < fs <= 102.4 kS/s
128 for 102.4 kS/s < fs <= 204.8 kS/s
That means at 50 kS/s the delta sigma converter is clocked with 12.8 Mhz (50 kHz * 256).
Summary of Contents for DEWE-ORION-0824-20 Series
Page 36: ...Page 36 DEWE ORION 0824 20x Notes...
Page 62: ...Page 62 DEWE ORION 0824 20x Notes...
Page 64: ...C2 Notes...
